參數(shù)資料
型號: DS2181AQ
廠商: DALLAS SEMICONDUCTOR
元件分類: Digital Transmission Controller
英文描述: DATACOM, FRAMER, PQCC44
封裝: PLASTIC, LCC-44
文件頁數(shù): 7/32頁
文件大小: 377K
代理商: DS2181AQ
DS2181A
15 of 32
TRANSMIT TIMING
A low-high transition at TMSYNC once per multiframe (every 2 milliseconds) or at a multiple of the
multiframe rate establishes outgoing CAS and/or CRC4 multiframe alignment. Output TMO indicates
that alignment. A low-high transition at TFSYNC at the frame rate (125 us) or at a multiple of the frame
rate establishes the outgoing frame position. Output TAF indicates that alignment. TMSYNC and/or
TFSYNC can be tied low by the user, in which case the arbitrary frame and multiframe alignment
established by the device will be indicated at TMO and TAF.
Output TAF also indicates frames containing the frame alignment signal. Those frames can be even or
odd numbering frames of the outgoing CAS multiframe (CCR.6).
TRANSMIT MULTIFRAME TIMING Figure 12
NOTES:
1. Alignment frames are even frames of the CAS and/or CRC4 multiframes (CCR.6 = 0).
2. Alignment frames are odd frames of the CAS multiframe (CCR.6 = 1).
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相關代理商/技術參數(shù)
參數(shù)描述
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