FT 1
參數(shù)資料
型號: DS2180AQ
廠商: Maxim Integrated Products
文件頁數(shù): 18/35頁
文件大小: 0K
描述: IC TRANSCEIVER T1 44-PLCC
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 28
功能: 收發(fā)器
接口: T1
電路數(shù): 1
電源電壓: 4.5 V ~ 5.5 V
電流 - 電源: 3mA
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 44-LCC(J 形引線)
供應(yīng)商設(shè)備封裝: 44-PLCC(16.59x16.59)
包裝: 管件
包括: 警報生成和檢測,B7 填充模式,B8ZS 模式,錯誤檢測和計數(shù)器,“硬件”模式,透明模式
DS2180A
25 of 35
193S FRAMING FORMAT Table 8
F-BIT USE
BIT USE IN EACH CHANNEL
FRAME
NUMBER
FT
1
FS
2
DATA
SIGNALING
4
SIGNALING-BIT USE
11
-
BITS 1-8
2-
0
BITS 1-8
30
-
BITS 1-8
4-
0
BITS 1-8
51
-
BITS 1-8
6
-
1
BITS 1-7
BIT 8
A
70
-
BITS 1-8
8-
1
BITS 1-8
91
-
BITS 1-8
10
-
1
BITS 1-8
11
0
-
BITS 1-8
12
-
0
3
BITS 1-7
BIT 8
B
NOTES:
1. FT (terminal framing) bits provide frame alignment information.
2. FS (signaling frame) bits provide multiframe alignment information.
3. The S-bit in frame 12 may be used for yellow alarm transmission and detection in some applications.
4. The user may program any individual channels clear, in which case bit 8 will be used for data, not
signaling.
Line Coding
T1 line data is transmitted in a bipolar alternative mark inversion line format; 1’s are transmitted as
alternating negative and positive pulses and 0’s are simply the absence of pulses. This technique
minimizes DC voltage on the T1 span and allows clock to be extracted from data. The network currently
has a 1’s density constraint to keep clock extraction circuitry functioning which is usually met by forcing
bit 7 of any channel consisting of all 0’s to 1. The use of Bipolar Eight Zero Substitution (B8ZS) satisfies
all the 1’s density requirement while allowing data traffic to be transmitted without corruption. This
feature is known as clear channel and is explained more completely in ATT C.B. #144. When the B8ZS
feature is enabled, any outgoing stream of eight consecutive 0’s is replaced with a B8ZS code word. If the
last 1 transmitted was positive, the inserted code is 000+-0-+; if negative, the code word inserted is 000-
+0+-. Bipolar violations occur in the fourth and seventh bit positions which are ignored by the DS2180A
error monitoring logic when B8ZS is enabled. Any received B8ZS code word is replaced with all 0’s if
B8ZS is enabled. Also, the receive status register will report any occurrence of B8ZS code words to the
host controller. This allows the user to monitor the link for upgrade to clear channel capability and
respond to it. The B8ZS monitoring feature works at all times and is independent of the state of CCR.2.
TRANSMIT SIDE OVERVIEW
The transmit side of the DS2180A is made up of six major functional blocks: timing and clock
generation, data selector, bipolar coder, yellow alarm, F-bit data and CRC. The timing and clock
generation circuit develops all onboard and output clocks to the system from inputs TCLK, TFSYNC, and
TMSYNC. The yellow alarm circuitry generates mode–dependent yellow alarms. The CRC block
generates checksum results utilized in 193E framing. F-bit data provides mode–dependent framing
patterns and allows insertion of link or S-bit data externally. All of these blocks feed into the data
selector where, under control of the CCR, TCR, TIRs and TTRs, the contents of the outgoing data stream
are established by bit selection and insertion. The bipolar coder formats the output of the data selector to
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