- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385273 > DS2164Q (MAXIM INTEGRATED PRODUCTS INC) G.726 ADPCM Processor(G.726自適應(yīng)音頻脈沖編碼處理器) PDF資料下載
參數(shù)資料
| 型號(hào)： | DS2164Q |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 編解碼器 |
| 英文描述： | G.726 ADPCM Processor(G.726自適應(yīng)音頻脈沖編碼處理器) |
| 中文描述： | A/MU-LAW, ADPCM CODEC, PQCC28 |
| 封裝： | PLASTIC, LCC-28 |
| 文件頁(yè)數(shù)： | 12/17頁(yè) |
| 文件大小： | 156K |
| 代理商： | DS2164Q |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)當(dāng)前第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)
DS2164Q
022698 12/17
TIME SLOT RESTRICTIONS
Under certain conditions, the DS2164Q does contain
some restrictions on the output time slots that are avail-
able. These restrictions are covered in detail in a sepa-
rate application note. No restrictions occur if the
DS2164Q is operated in the hardware mode.
INPUT TO OUTPUT DELAY
With all three compressions algorithms, the total delay,
from the time the PCM data sample is captured by the
DS2164Q to the time it is output, is always less than 375
μ
s. The exact delay is determined by the input and out-
put time slots selected for each channel.
CHANNEL ASSOCIATED SIGNALING
The DS2164Q supports Channel Associated Signaling
(CAS) via its ability to automatically change from the
32Kbps compression algorithm to the 24Kbps algo-
rithm. If the DS2164Q is configured to perform the
32Kbps algorithm, then in both the hardware and soft-
ware mode, it will sense the frame sync inputs (FSX and
FSY) for a double wide frame sync pulse. Whenever the
DS2164Q receives a double wide pulse, it will automati-
cally switch from the 32Kbps algorithm to the 24Kbps al-
gorithm. Switching to the 24Kbps algorithm allows the
user to insert signaling data into the LSB bit position of
the ADPCM output because this bit does not contain
any useful speech information.
ON-THE-FLY ALGORITHM SELECTION
In the software mode, the user can switch between the
three available algorithms on-the-fly. That is, the
DS2164Q does not need to be reset or stopped to make
the change from one algorithm to another. The
DS2164Q reads the Control Register before it starts to
process each PCM or ADPCM sample. If the user
wishes to switch algorithms, then the Control Register
must be updated via the serial port before the first input
sample to be processed with the new algorithm arrives
at either XIN or YIN. The PCM and ACPCM outputs will
tristate during register updates.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DS2175 | T1/CEPT Elastic Store(T1/CEPT 彈性存儲(chǔ)器) |
| DS2180A | T1 Transceiver(T1收發(fā)器) |
| DS2187 | Receive Line Interface(接收線接口) |
| DS2250T | Soft Microcontroller Module(軟件微控制器模塊) |
| DS2251T | 128K Soft Microcontroller Module(128K軟件微控制器模塊) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS2164Q/T&R | 制造商:Maxim Integrated Products 功能描述:ADPCM PROCESSOR 28PIN PLCC T&R - Tape and Reel |
| DS2164Q/T&R+ | 制造商:Maxim Integrated Products 功能描述:ADPCM PROCESSOR 28P PLCC T&R LF - Tape and Reel |
| DS2164Q/T&R | 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| DS2164Q+ | 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| DS2164Q+T&R | 制造商:Maxim Integrated Products 功能描述:ADPCM PROCESSOR 28PLCC - Tape and Reel |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。