參數(shù)資料
型號(hào): DS2151QB
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 37/60頁(yè)
文件大?。?/td> 0K
描述: IC TXRX T1 1-CHIP 5V LP 44-PLCC
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 26
功能: 單芯片收發(fā)器
接口: T1
電路數(shù): 1
電源電壓: 4.75 V ~ 5.25 V
電流 - 電源: 65mA
工作溫度: 0°C ~ 70°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 44-LCC(J 形引線)
供應(yīng)商設(shè)備封裝: 44-PLCC(16.59x16.59)
包裝: 管件
包括: 警報(bào)檢測(cè)器和發(fā)生器,CSU 回路代碼發(fā)生器和檢測(cè)器,DSX-1和CSU 線路補(bǔ)償發(fā)生器
產(chǎn)品目錄頁(yè)面: 1429 (CN2011-ZH PDF)
DS2151Q
42 of 60
13.3 Jitter Attenuator
The DS2151Q contains an on-board jitter attenuator that can be set to a depth of either 32 or 128 bits via
the JABDS bit in the Line Interface Control Register (LICR). The 128-bit mode is used in applications
where large excursions of wander are expected. The 32-bit mode is used in delay sensitive applications.
The characteristics of the attenuation are shown in Figure 13-4. The jitter attenuator can be placed in
either the receive path or the transmit path by appropriately setting or clearing the JAS bit in the LICR.
Also, the jitter attenuator can be disabled (in effect, removed) by setting the DJA-bit in the LICR. In order
for the jitter attenuator to operate properly, a crystal with the specifications listed in Table 13-4 below
must be connected to the XTAL1 and XTAL2 pins. The jitter attenuator divides the clock provided by the
6.176MHz crystal at the XTAL1 and XTAL2 pins to create an output clock that contains very little jitter.
On-board circuitry will pull the crystal (by switching in or out load capacitance) to keep it long-term
averaged to the same frequency as the incoming T1 signal. If the incoming jitter exceeds either 120UIP-P
(buffer depth is 128 bits) or 28UIP-P (buffer depth is 32 bits), then the DS2151Q will divide the attached
crystal by either 3.5 or 4.5 instead of the normal 4 to keep the buffer from overflowing. When the device
divides by either 3.5 or 4.5, it also sets the Jitter Attenuator Limit Trip (JALT) bit in the Receive
Information Register 2 (RIR2.2).
Table 13-4. Crystal Selection Guidelines
PARAMETER
SPECIFICATION
Parallel Resonant Frequency
6.176MHz
Mode
Fundamental
Load Capacitance
18pF to 20pF (18.5pF nominal)
Tolerance
±50ppm
Pullability
CL = 10pF, delta frequency = +175ppm to
+250ppm
CL = 45pF, delta frequency = -175ppm to -250ppm
Effective Series Resistance
40
maximum
Crystal Cut
AT
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DS2151QB/T&R 制造商:Maxim Integrated Products 功能描述:T1 SINGLE CHIP XCVR REV B T&R - Tape and Reel
DS2151QB/T&R+ 制造商:Maxim Integrated Products 功能描述:FRAMER DS1/E1/ISDN-PRI/T1 5V 44PLCC - Tape and Reel
DS2151QB/T&R 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流(最大值):595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS2151QB+ 功能描述:網(wǎng)絡(luò)控制器與處理器 IC T1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流(最大值):595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS2151QB+T&R 制造商:Maxim Integrated Products 功能描述:FRAMER DS1/E1/ISDN-PRI/T1 5V 44PLCC - Tape and Reel