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參數(shù)資料
| 型號(hào)： | DS2141A |
| 英文描述： | T1 Controller |
| 中文描述： | T1控制器 |
| 文件頁數(shù)： | 3/39頁 |
| 文件大小： | 470K |
| 代理商： | DS2141A |
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DS2141A
3 of 39
DS2141A FEATURES
Parallel control port
Large error counters
Onboard dual 2-frame elastic store
FDL support circuitry
Robbed-bit signaling extraction and insertion
Programmable output clocks
Fully independent transmit and receive sections
Frame sync generation
Error-tolerant yellow and blue alarm detection
Output pin test mode
Payload loopback capability
SLC-96 support
Remote loop up/down code detection
Loss of transmit clock detection
Loss of receive clock detection
1's density violation detection
PIN DESCRIPTION
Table 1
PIN
SYMBOL
1
TCLK
2
TSER
TYPE
I
I
DESCRIPTION
Transmit Clock.
1.544 MHz primary clock.
Transmit Serial Data.
Transmit NRZ serial data, sampled on the
falling edge of TCLK.
Transmit Channel Clock.
192 kHz clock which pulses high during
the LSB of each channel. Useful for parallel-to-serial conversion of
channel data, locating robbed-bit signaling bits, and for blocking
clocks in DDS applications. See Section 13 for timing details.
Transmit Bipolar Data.
Updated on rising edge of TCLK.
3
TCHCLK
O
4
5
TPOS
TNEG
AD0-AD7
BTS
O
6-13
14
I/O
I
Address/Data Bus.
An 8-bit multiplexed address/data bus.
Bus Type Select.
Strap high to select Motorola bus timing; strap
low to select Intel bus timing. This pin controls the function of
RD
(DS), ALE(AS), and
WR
(R/
W
) pins. If BTS=1, then these pins
assume the function listed in parentheses ().
Read Input (Data Strobe).
Chip Select.
Must be low to read or write the port.
Address Latch Enable (Address Strobe).
A positive-going edge
serves to demultiplex the bus.
Write Input (Read/Write).
Receive Link Data.
Updated with either FDL data (ESF) or Fs-bits
(D4) or Z-bits (ZBTSI) one RCLK before the start of a frame. See
Section 13 for timing details.
Signal Ground.
0.0 volts.
Receive Link Clock.
192 kHz clock which pulses high during the
LSB of each channel. Useful for parallel-to-serial conversion of
channel data, locating robbed-bit signaling bits, and for blocking
clocks in DDS applications. See Section 13 for timing details.
Receive Clock.
1.544 MHz primary clock.
15
16
17
RD
(DS)
CS
ALE(AS)
I
I
I
18
19
WR
(R/
W
)
RLINK
I
O
20
21
VSS
RLCLK
-
O
22
RCLK
I
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS2141AN | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC T1 Controller w/Elastic Store RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS2141AQ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS2141AQ/T&R | 制造商:Maxim Integrated Products 功能描述:T1 CONTROL. W/ELAS.ST. 44-PLCC TRL - Tape and Reel 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述:IC CONTROLLER T1 5V 44-PLCC |
| DS2141AQ/T&R+ | 制造商:Maxim Integrated Products 功能描述:T1 CNTRLR 44PLCC - Tape and Reel |
| DS2141AQ/T&R | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC T1 Controller w/Elastic Store RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
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