參數(shù)資料
型號: DS1994L-F5
英文描述: 4kb Plus Time Memory iButton
中文描述: 4KB的另外iButton的時間內(nèi)存
文件頁數(shù): 18/22頁
文件大?。?/td> 254K
代理商: DS1994L-F5
DS1994
Figure 11. READ/WRITE TIMING DIAGRAM
(continued)
18 of 22
Write-Zero Time Slot
V
PULLUP
V
PULLUP MIN
V
IH MIN
15μs
RESISTOR
MASTER
DS1994
Sampling Window
60μs
t
LOW0
60μs
t
LOW0
< t
SLOT
< 120μs
1μs
t
REC
<
V
IL MAX
0V
t
SLOT
t
REC
Read-Data Time Slot
V
PULLUP
V
PULLUP MIN
V
IH MIN
RESISTOR
MASTER
DS1994
Master
60μs
t
SLOT
< 120μs
1μs
t
LOWR
< 15μs
0
t
RELEASE
< 45μs
1μs
t
REC
<
t
RDV
= 15μs
t
SU
< 1μs
V
IL MAX
0V
t
SLOT
t
REC
t
LOWR
t
SU
t
RDV
t
RELEASE
Sampling Window
Interrupts
If the DS1994 detects an alarm condition, it automatically sets the corresponding alarm flag in the status
register. An interrupt condition begins whenever any alarm flag is set and the flag’s corresponding
interrupt bit is enabled. The interrupt condition ceases when the alarm flags are cleared (i.e., the interrupt
is acknowledged by reading the status register, address 200H) or if the corresponding interrupt enable bit
is disabled.
The DS1994 can produce two types of interrupts: spontaneous interrupts, called type 1, and delayed
interrupts, type 2. Spontaneous interrupts need to be armed by a reset pulse after all communication on
the 1-Wire bus has finished. A single falling slope on the 1-Wire bus disarms this type of interrupt. If an
alarm condition occurs while the device is disarmed, at first a type 2 interrupt is produced.
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