參數(shù)資料
型號: DS18B20+PAR
廠商: Maxim Integrated
文件頁數(shù): 14/19頁
文件大?。?/td> 221K
描述: IC THERM MICROLAN PROG-RES TO-92
產品培訓模塊: 1-Wire Communications
Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 500
功能: 溫度計,恒溫計
傳感器類型: 內部
感應溫度: -55°C ~ 100°C
精確度: ±2°C(最小值)
拓撲: 寄存器庫,變簽式暫存器
輸出類型: 1-Wire?
輸出警報:
輸出風扇:
電源電壓: 3 V ~ 5.5 V
工作溫度: -55°C ~ 100°C
安裝類型: 通孔
封裝/外殼: TO-226-3、TO-92-3 標準主體
供應商設備封裝: TO-92-3
包裝: 管件
產品目錄頁面: 1435 (CN2011-ZH PDF)
DS18B20-PAR
 
14 of 19 
The DS18B20-PAR samples the 1-Wire bus during a window that lasts from 15 約 to 60 約 after the
master initiates the write time slot. If the bus is high during the sampling window, a 1 is written to the
DS18B20-PAR. If the line is low, a 0 is written to the DS18B20-PAR.
 
READ/WRITE TIME SLOT TIMING DIAGRAM Figure 13
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
READ TIME SLOTS
The DS18B20-PAR can only transmit data to the master when the master issues read time slots.
Therefore, the master must generate read time slots immediately after issuing a Read Scratchpad [BEh]
command, so that the DS18B20-PAR can provide the requested data. In addition, the master can generate
read time slots after issuing a Recall E
2
 [B8h] command to find out the recall status as explained in the
DS18B20-PAR FUNCTION COMMAND section.
 
All read time slots must be a minimum of 60 約 in duration with a minimum of a 1 約 recovery time
between slots. A read time slot is initiated by the master device pulling the 1-Wire bus low for a
minimum of 1 約 and then releasing the bus (see Figure 13). After the master initiates the read time slot,
the DS18B20-PAR will begin transmitting a 1 or 0 on bus. The DS18B20-PAR transmits a 1 by leaving
the bus high and transmits a 0 by pulling the bus low. When transmitting a 0, the DS18B20-PAR will
release the bus by the end of the time slot, and the bus will be pulled back to its high idle state by the
pullup resister. Output data from the DS18B20-PAR is valid for 15 約 after the falling edge that initiated
45 ?/SPAN>s
15 ?/SPAN>s  
V
PU
 
GND
1-WIRE BUS
60 ?/SPAN>s < T
X
 0 < 120
1 ?/SPAN>s < T
REC
 <    
DS18B20-PAR samples
MIN TYP MAX
15 ?/SPAN>s  
30   s
> 1   s
MASTER WRITE 0 SLOT
MASTER WRITE 1 SLOT 
DS18B20-PAR samples
MIN TYP MAX
V
PU
 
GND
1-WIRE BUS
15   s
MASTER READ 0 SLOT
MASTER READ 1 SLOT 
Master samples
Master samples 
START
OF SLOT 
START
OF SLOT 
> 1   s
1 ?/SPAN>s < T
REC
 <    
15 ?/SPAN>s  
15   s
30 ?/SPAN>s  
15   s
LINE TYPE LEGEND
Bus master pulling low
 
DS18B20-PAR pulling low
 
 
Resistor pullup
> 1 ?/SPAN>s 
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