參數(shù)資料
型號: DS1884AT+T
廠商: Maxim Integrated Products
文件頁數(shù): 60/92頁
文件大?。?/td> 0K
描述: IC SFP PON ONU CTRLR 24TQFN
標(biāo)準(zhǔn)包裝: 2,500
系列: *
DS1884
SFP and PON ONU Controller
with Digital LDD Interface
63
Maxim Integrated
A2h Table 02h, Register 89h: CNFGA
FACTORY DEFAULT
80h
READ ACCESS
PW2 or (PW1 and RWTBL246) or (PW1 and RBL246)
WRITE ACCESS
PW2 or (PW1 and RWTBL246)
MEMORY TYPE
Nonvolatile (SEE)
89h
RESERVED
INV LOS
ASEL
MASK
RESERVED
INVTXFI
BIT 7
BIT 0
BITS 7:6
RESERVED
BIT 5
INV LOS: Inverts the buffered input pin LOS to output pin LOSOUT.
0 = Noninverted LOS to LOSOUT pin.
1 = Inverted LOS to LOSOUT pin.
BIT 4
ASEL: Address select.
0 = Device address is A2h.
1 = DEVICE ADDRESS byte in A2h Table 02h, Register 8Ch is used as the device address.
BIT 3
MASK:
0 = Alarm enable row exists at A2h Table 01h, Registers F8h–FFh. A2h Table 05h, Registers F8h–
FFh are empty.
1 = Alarm enable row exists at A2h Table 05h, Registers F8h–FFh. A2h Table 01h, Registers F8h–
FFh are empty.
BITS 2:1
RESERVED
BIT 0
INVTXFI: Allow for inversion of signal driven by TXF input pin.
0 = (Default) TXF signal is not inverted.
1 = TXF signal is inverted.
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