參數(shù)資料
型號: DS1865K
廠商: Maxim Integrated Products
文件頁數(shù): 59/67頁
文件大?。?/td> 0K
描述: KIT EVAL FOR DS1865
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 1
主要目的: 電信,無源光學網(wǎng)絡(PON)
已用 IC / 零件: DS1865
DS1865
PON Triplexer Control and
Monitoring Circuit
62
____________________________________________________________________
Table 02h, Register C5h to C6h: Reserved
FACTORY DEFAULT:
0000 0000h
READ ACCESS
PW2
WRITE ACCESS
PW2
MEMORY TYPE:
Nonvolatile (SEE)
These registers are reserved.
Table 02h, Register C7h: M4 LUT Cntl
FACTORY DEFAULT
00h
READ ACCESS
PW2
WRITE ACCESS
PW2
MEMORY TYPE:
Nonvolatile (SEE)
C7h
RESERVED
DBL_SB
UP_LOWB
bit7
bit0
Controls the size and location of LUT functions for the MON4 measurement.
Bit7:2
RESERVED: Default = 000000b.
Bit1
DBL_SB: Chooses the size of LUT for Table 06h.
0 = (Default) Single LUT of 32 bytes.
1 = Double LUT of 16 bytes.
Bit0
UP_LOWB: Determines which 16-byte LUT is used if DBL_SB = 1. If DBL_SB = 0, the value of this
bit is a don’t care.
0 = (Default) Chooses the lower 16 bytes of Table 06h (Registers 80h-8Fh).
1 = Chooses the upper 16 bytes of Table 06h (Registers 90h-9Fh).
Table 02h, Register C8h to F7h: No Memory
Table 02h, Register F8h to F9h: MAN IBIAS
FACTORY DEFAULT:
00h
READ ACCESS
PW2
WRITE ACCESS
PW2 and (BIAS-EN = 0)
MEMORY TYPE:
Volatile
F8h
RESERVED
2
12
2
11
2
10
2
9
2
8
2
7
F9h
2
7
2
6
2
5
2
4
2
3
2
1
2
0
bit7
bit0
When BIAS-EN (Table 02h, Register 80h) is written to 0, writes to these bytes will control the IBIAS DAC. See MAN_CNTL (Table 02h,
Register FAh) for details.
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