- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄9051 > DS1855E-010 (Maxim Integrated Products)IC RES TEMP-CNTRL 10/10K 14TSSOP PDF資料下載
參數(shù)資料
| 型號： | DS1855E-010 |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 20/21頁 |
| 文件大小： | 0K |
| 描述： | IC RES TEMP-CNTRL 10/10K 14TSSOP |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 96 |
| 接片： | 100，256 |
| 電阻（歐姆）： | 10k，100k |
| 電路數(shù)： | 2 |
| 溫度系數(shù)： | 標準值 750 ppm/°C |
| 存儲器類型： | 非易失 |
| 接口： | I²C（設備位址） |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 14-TSSOP（0.173"，4.40mm 寬） |
| 供應商設備封裝： | 14-TSSOP |
| 包裝： | 管件 |
DS1855
8 of 21
2-WIRE SERIAL PORT OPERATION
The 2-wire serial port interface supports a bidirectional data transmission protocol with device
addressing. A device that sends data on the bus is defined as a transmitter, and a device receiving data is
defined as a receiver. The device that controls the message is called a “master.” The devices that are
controlled by the master are “slaves.” The bus must be controlled by a master device that generates the
serial clock (SCL), controls the bus access, and generates the START and STOP conditions. The DS1855
operates as a slave on the two-wire bus. Connections to the bus are made via the open-drain I/O lines,
SDA and SCL. The following I/O terminals control the 2-wire serial port: SDA, SCL, A0, A1, A2.
Timing diagrams for the 2-wire serial port can be found in Figures 2 and 3. Timing information for the 2-
wire serial port is provided in the AC Electrical Characteristics table for 2-wire serial communications.
The following bus protocol has been defined:
1. Data transfer may be initiated only when the bus is not busy.
2. During data transfer, the data line must remain stable whenever the clock line is HIGH. Changes in
the data line while the clock line is HIGH will be interpreted as control signals.
Accordingly, the following bus conditions have been defined:
Bus not busy: Both data and clock lines remain HIGH.
Start data transfer: A change in the state of the data line from HIGH to LOW while the clock is HIGH
defines a START condition.
Stop data transfer: A change in the state of the data line from LOW to HIGH while the clock line is
HIGH defines the STOP condition.
Data valid: The state of the data line represents valid data when, after a START condition, the data line
is stable for the duration of the clock signal’s HIGH period. The data on the line can be changed during
the clock signal’s LOW period. There is one clock pulse per bit of data. Figures 2 and 3 detail how data
transfer is accomplished on the 2-wire bus. Depending on the state of the R/W bit, two types of data
transfer are possible.
Each data transfer is initiated with a START condition and terminated with a STOP condition. The
number of data bytes transferred between START and STOP conditions is not limited and is determined
by the master device. The information is transferred byte-wise and each receiver acknowledges with a 9th
bit.
A regular mode (100kHz clock rate) and a fast mode (400kHz clock rate) are defined within the bus
specifications. The DS1855 works in both modes.
Acknowledge: Each receiving device, when addressed, is obliged to generate an acknowledge after the
reception of each byte. The master device must generate an extra clock pulse, which is associated with
this acknowledge bit.
A device that acknowledges must pull down the SDA line during the acknowledge clock pulse in such a
way that the SDA line is a stable LOW during the HIGH period of the acknowledge-related clock pulse.
Of course, setup and hold times must be taken into account. A master must signal an end of data to the
相關PDF資料 |
PDF描述 |
|---|---|
| M83723/86W22556 | CONN PLUG 55POS STRAIGHT W/SCKT |
| VI-JWW-MZ-S | CONVERTER MOD DC/DC 5.5V 25W |
| IDT2309-1DCGI | IC CLK BUFFER ZD STD DRV 16-SOIC |
| VI-JWW-MZ-F4 | CONVERTER MOD DC/DC 5.5V 25W |
| GTC030R-18-1P | CONN RCPT 10POS PANEL MNT W/PINS |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| DS1855E-010/R | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:Dual Nonvolatile Digital Potentiometer and Secure Memory |
| DS1855E-010/T | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:Dual Nonvolatile Digital Potentiometer and Secure Memory |
| DS1855E-010/T&R | 制造商:Maxim Integrated Products 功能描述:DUAL NV POT & MEM TSSOP T&R 10/10K - Tape and Reel 制造商:Maxim Integrated Products 功能描述:IC RES TEMP-CNTRL 10/10K 14TSSOP |
| DS1855E-010/T&R | 功能描述:數(shù)字電位計 IC RoHS:否 制造商:Maxim Integrated 電阻:200 Ohms 溫度系數(shù):35 PPM / C 容差:25 % POT 數(shù)量:Dual 每 POT 分接頭:256 弧刷存儲器:Volatile 緩沖刷: 數(shù)字接口:Serial (3-Wire, SPI) 描述/功能:Dual Volatile Low Voltage Linear Taper Digital Potentiometer 工作電源電壓:1.7 V to 5.5 V 電源電流:27 uA 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:TQFN-16 封裝:Reel |
| DS1855E-010+ | 功能描述:數(shù)字電位計 IC Dual NV w/Memory RoHS:否 制造商:Maxim Integrated 電阻:200 Ohms 溫度系數(shù):35 PPM / C 容差:25 % POT 數(shù)量:Dual 每 POT 分接頭:256 弧刷存儲器:Volatile 緩沖刷: 數(shù)字接口:Serial (3-Wire, SPI) 描述/功能:Dual Volatile Low Voltage Linear Taper Digital Potentiometer 工作電源電壓:1.7 V to 5.5 V 電源電流:27 uA 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:TQFN-16 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復。