參數(shù)資料
型號: DS1746W-120IND+
廠商: Maxim Integrated Products
文件頁數(shù): 7/16頁
文件大?。?/td> 0K
描述: IC RTC RAM Y2K 3.3V 120NS 32EDIP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 11
類型: 時鐘/日歷
特點: 閏年,NVSRAM,Y2K
存儲容量: 128KB
時間格式: HH:MM:SS(24 小時)
數(shù)據(jù)格式: YY-MM-DD-dd
接口: 并聯(lián)
電源電壓: 2.97 V ~ 3.63 V
工作溫度: -40°C ~ 85°C
安裝類型: 通孔
封裝/外殼: 32-DIP 模塊(0.600",15.24mm)
供應(yīng)商設(shè)備封裝: 32-EDIP
包裝: 管件
DS1746/DS1746P Y2K-Compliant, Nonvolatile Timekeeping RAMs
15 of 16
AC TEST CONDITIONS
Output Load: 50pF + 1TTL Gate
Input Pulse Levels: 0 to 3.0V
Timing Measurement Reference Levels:
Input: 1.5V
Output: 1.5V
Input Pulse Rise and Fall Times: 5ns
NOTES:
1) Voltages are referenced to ground.
2) Typical values are at +25°C and nominal supplies.
3) Outputs are open.
4) Battery switchover occurs at the lower of either the battery terminal voltage or VPF.
5) Data-retention time is at +25°C.
6) Each DS1746 has a built-in switch that disconnects the lithium source until VCC is first applied by the
user. The expected tDR is defined for DIP modules and assembled PowerCap modules as a cumulative
time in the absence of VCC starting from the time power is first applied by the user.
7) RTC modules (DIP) can be successfully processed through conventional wave-soldering techniques
as long as temperatures as long as temperature exposure to the lithium energy source contained within
does not exceed +85°C. Post-solder cleaning with water-washing techniques is acceptable, provided
that ultra-sonic vibration is not used.
In addition, for the PowerCap:
a) Maxim recommends that PowerCap module bases experience one pass through solder reflow
oriented with the label side up (“l(fā)ive-bug”).
b) Hand soldering and touch-up: Do not touch or apply the soldering iron to leads for more than
3 seconds. To solder, apply flux to the pad, heat the lead frame pad, and apply solder. To remove
the part, apply flux, heat the lead frame pad until the solder reflows, and use a solder wick to
remove solder.
8) tWR1, tDH1 are measured from WE going high.
9) tWR2, tDH2 are measured from CE going high.
10) tWC = 200ns.
PACKAGE INFORMATION
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix
character, but the drawing pertains to the package regardless of RoHS status.
PACKAGE TYPE
PACKAGE CODE
OUTLINE NO.
LAND PATTERN NO.
32 EDIP
MDF32+1
34 PWRCP
PC2+6
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