參數資料
型號: DS1710
廠商: DALLAS SEMICONDUCTOR
元件分類: 微控制器/微處理器
英文描述: Partitioned NV Controller(分割式非易失性控制器)
中文描述: SPECIALTY MICROPROCESSOR CIRCUIT, PDIP16
封裝: 0.300 INCH, DIP-16
文件頁數: 1/12頁
文件大小: 283K
代理商: DS1710
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
AD6459
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
World Wide Web Site: http://www.analog.com
Fax: 617/326-8703
Analog Devices, Inc., 1996
GSM 3 V Receiver IF Subsystem
FUNCTIONAL BLOCK DIAGRAM
BPF
PLL
LO
I
Q
GAIN
CONTROL
FREF
RF
AD6459
FEATURES
Fully Compliant with Standard and Enhanced GSM
Specification
–11 dBm Input 1 dB Compression Point
0 dBm Input Third Order Intercept
10 dB SSB Noise Figure (50
V
)
DC-500 MHz RF and LO Bandwidths
Linear IF Amplifier
Linear-in-dB and Stable over Temperature
Voltage Gain Control
Quadrature Demodulator
On-Board Phase-Locked Quadrature Oscillator
Demodulates IFs from 5 MHz to 50 MHz
Low Power
8 mA at Midgain
2
m
A Sleep Mode Operation
2.7 V to 5.5 V Operation
Interfaces to AD7013, AD7015 and AD6421 Baseband
Converters
20-Lead SSOP
GENERAL DESCRIPTION
The AD6459 is a 3 V, low power receiver IF subsystem for
operation at input frequencies as high as 500 MHz and IFs
from 5 MHz up to 50 MHz. It is optimized for operation in
GSM, DCS1800 and PCS1900 receivers. It consists of a mixer,
an IF amplifier, I and Q demodulators, a phase-locked quadra-
ture oscillator, a precise AGC subsystem, and a biasing system
with external power-down.
The AD6459’s low noise, high intercept mixer is a doubly-
balanced Gilbert-Cell type. It has a nominal –11 dBm input-
referred 1 dB compression point and a 0 dBm input-referred
third-order intercept. The mixer section of the AD6459 also
includes a local oscillator (LO) preamplifier, which lowers the
required LO drive to –16 dBm.
The gain control input accepts an external gain-control voltage
input from an external AGC detector or a DAC. It provides an
80 dB gain range with 27 mV/dB gain scaling.
The I and Q demodulators provide in-phase and quadrature
baseband outputs to interface with Analog Devices’ AD7013
(IS54, TETRA, MSAT) AD7015 and AD6421 (GSM,
DCS1800, PCS1900) baseband converters. An on-board
quadrature VCO that is externally phase-locked to the IF signal
drives the I and Q demodulators. This locked reference signal is
normally provided by an external VCTCXO under the control of
the radio’s digital processor. The AD6459 can also provide
demodulation of N-PSK and N-QAM in many non-TDMA
systems when used with external analog carrier recovery systems
such as the Costas Loop. Finally, the VCO can be phase-locked
to a frequency that is deliberately offset from the IF as in the
case of a Beat-Frequency oscillator (BFO) resulting in the
product detection of CW or SSB.
The AD6459 uses supply voltages from 2.7 V to 5.5 V over the
temperature range of –40
°
C to +85
°
C. Operation is enabled by a
CMOS logical level; response time is typically < 80
μ
s. When
disabled, the standby current is reduced to 2
μ
A.
The AD6459 comes in a 20-pin shrink small outline (SSOP)
surface mount package.
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