參數(shù)資料
型號: DS1644LPM
英文描述: Nonvolatile Timekeeping RAM
中文描述: 非易失性內(nèi)存時鐘
文件頁數(shù): 1/11頁
文件大?。?/td> 108K
代理商: DS1644LPM
ACopyright 1995 by Dallas Semiconductor Corporation.
DS1644LPM
Nonvolatile Timekeeping RAM
DS1644LPM
041697 1/11
FEATURES
Upward compatible with the DS1643AL Timekeeping
RAM to achieve higher RAM density
Integrated NV SRAM, real time clock, crystal, power–
fail control circuit and lithium energy source
Low profile socketable module
– 255 mil package height
Clock registers are accessed identical to the static
RAM. These registers are resident in the eight top
RAM locations.
Totally nonvolatile with over 10 years of operation in
the absence of power
Access time of 120 ns and 150 ns
Quartz accuracy
±
1 minute a month @ 25
°
C, factory
calibrated
BCD coded year, month, date, day, hours, minutes,
and seconds with leap year compensation valid up to
2100
Power–fail write protection allows for
±
10% V
CC
pow-
er supply tolerance
ORDERING INFORMATION
DS1644L–XXX
–120
–150
120 ns access
150 ns access
Low Profile Module
PIN ASSIGNMENT
OE
CE
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
GND
WE
PFO
V
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
NC
NC
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
NC
NC
NC
34–PIN LOW PROFILE MODULE
PIN DESCRIPTION
A0–A14
CE
OE
WE
V
GND
DQ0-DQ7
NC
PFO
– Address Input
– Chip Enable
– Output Enable
– Write Enable
– +5 Volts
– Ground
– Data Input/Output
– No Connection
– Power Fail Output
DESCRIPTION
The DS1644L is a low profile module that requires a
PLCC surface mountable socket and is functionally
equivalent to the DS1644. The DS1644L is a 32K x 8
nonvolatile static RAM with a full function real time clock
which are both accessible in a Byte–wide format. The
real time clock information resides in the eight upper-
most RAM locations. The RTC registers contain year,
month, date, day, hours, minutes, and seconds data in
24 hour BCD format. Corrections for the day of the
month and leap year are made automatically. The RTC
clock registers are double buffered to avoid access of in-
correct data that can occur during clock update cycles.
The double buffered system also prevents time loss as
the timekeeping countdown continues unabated by ac-
cess to time register data. The DS1644L also contains
its own power–fail circuitry which deselects the device
when the V
CC
supply is in an out–of–tolerance condi-
tion. This feature prevents loss of data from unpredict-
able system operation brought on by low V
CC
as errant
access and update cycles are avoided.
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