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參數(shù)資料
| 型號： | DS1603 |
| 元件分類： | 通用總線功能 |
| 英文描述： | Elapsed Time Counter Module |
| 中文描述： | 歷時計數(shù)器模塊 |
| 文件頁數(shù)： | 7/8頁 |
| 文件大?。?/td> | 104K |
| 代理商： | DS1603 |
DS1603
7 of 8
AC ELECTRICAL CHARACTERISTICS
PARAMETER
Data to CLK Setup
CLK to Data Hold
CLK to Data Delay
CLK Low Time
CLK High Time
CLK Frequency
CLK Rise & Fall
RST
to CLK Setup
CLK to RST Hold
RST
Inactive Time
RST
Low to I/O High Z
CLK High to I/O High Z
(V
CC
= +5V ±10%; 0°C to +70°C)
MAX
UNITS
ns
ns
200
ns
ns
ns
2.0
MHz
500
ns
ns
ns
μs
70
ns
20
ns
SYMBOL
t
DC
t
CDH
t
CDD
t
CL
t
CH
f
CLK
t
F,
t
R
t
CC
t
CCH
t
CWH
t
RDZ
t
CDZ
MIN
50
60
TYP
NOTES
6
6
6, 7, 8
6
6
6
250
250
DC
100
60
1
6
6
6
6
6
(t
A
= 25°C)
NOTES
10
PARAMETER
Expected Data
Retention Time
SYMBOL
t
DR
MIN
10
TYP
MAX
UNITS
years
NOTES:
1.
All voltages are reference to ground.
2.
Logic 1 voltages are specified at a source current of 1 mA.
3.
Logic 0 voltages are specified at a sink current of 4 mA.
4.
I
CC
is specified with the DQ pin open.
5.
I
CC1
is specified with V
CC
at 5.0V and
RST
= GND.
6.
Measured at V
IH
= 2.0V or V
IL
= 0.8V.
7.
Measured at V
OH
= 2.4V or V
OL
– 0.4V.
8.
Load capacitance = 50 pF.
9.
Battery trip point is the point at which the V
CC
powered counter and the serial port stop operation.
10.
The expected t
DR
is defined as accumulative time in the absence of V
CC
with the clock oscillator
running.
11.
Real–Time Clock Modules can be successfully processed through conventional wave–soldering
techniques as long as temperature exposure to the lithium energy source contained within does not
exceed +85
°
C. Post-solder cleaning with water washing techniques is acceptable, provided that
ultrasonic vibration is not used.
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