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參數(shù)資料
| 型號： | DS1511W |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 9/22頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC RTC WDOG Y2K 3.3V 28-EDIP |
| 標(biāo)準(zhǔn)包裝： | 12 |
| 類型： | 時(shí)鐘/日歷 |
| 特點(diǎn)： | 警報(bào)器，閏年，NVSRAM，方波輸出，監(jiān)視計(jì)時(shí)器，Y2K |
| 存儲容量： | 256B |
| 時(shí)間格式： | HH:MM:SS（24 小時(shí)） |
| 數(shù)據(jù)格式： | YY-MM-DD-dd |
| 接口： | 并聯(lián) |
| 電源電壓： | 3 V ~ 3.6 V |
| 電壓 - 電源，電池： | 2.5 V ~ 3.7 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 28-DIP 模塊（0.600"，15.24mm） |
| 供應(yīng)商設(shè)備封裝： | 28-EDIP |
| 包裝： | 管件 |
DS1501/DS1511 Y2KC Watchdog Real-Time Clocks
17 of 22
device is powered by either VCC, VBAT, or VBAUX. If either watchdog register is nonzero, a timeout sets the WDF bit
to 1, regardless of the state of the watchdog enable (WDE) bit, to serve as an indication to the processor that a
watchdog timeout has occurred. The watchdog timer operates in two modes, repetitive and single-shot.
If WDE is 1 and the watchdog steering bit (WDS) is 0, the watchdog is in repetitive mode. When the watchdog
times out, both WDF and IRQF are set. IRQ goes active and IRQF goes to 1. The watchdog timer is reloaded when
the processor performs a write of the watchdog registers and the timeout period restarts. Reading control A register
clears IRQF .
If WDE and WDS are 1, the watchdog is in single-shot mode. When the watchdog times out, RST goes active for a
period of 40ms to 200ms. When RST goes inactive, WDE resets to 0. Writing a value of 00h to both watchdog
registers disables the watchdog timer. The watchdog function is automatically disabled upon power-up by the
power-on reset setting WDE = 0 and WDS = 0. The watchdog registers are not initialized at power-up and should
be initialized by the user.
Note: The TE bit must be used to disable transfers when writing to the watchdog registers.
The following summarizes the configurations in which the watchdog can be used:
WDE = 0 and WDS = 0: WDF is set.
WDE = 0 and WDS = 1: WDF is set.
WDE = 1 and WDS = 0: WDF and IRQF are set, and the IRQ pin is pulled low.
WDE = 1 and WDS = 1: WDF is set, the RST pin pulses low, and WDE resets to 0.
WAKEUP/KICKSTART
The DS1501/DS1511 incorporate a wakeup feature, which powers on at a predetermined day/date and time by
activating the PWR output pin. Additionally, the kickstart feature allows the system to be powered up in response to
a low-going transition on the KS pin, without operating voltage applied to the VCC pin. As a result, system power
can be applied upon such events as key closure or a modem-ring-detect signal. To use either the wakeup or the
kickstart features, the DS1501/DS1511 must have an auxiliary battery connected to the VBAUX pin, and the oscillator
must be running.
The wakeup feature is controlled through the time-of-day/date power-enable bit (TPE). Setting TPE to 1 enables
the wakeup feature. Transfers (TE) must be enabled for a wake up event to occur. Writing TPE to 0 disables the
wakeup feature. The kickstart feature is always enabled as long as VBAUX is present.
If the wakeup feature is enabled, while the system is powered down (no VCC voltage), the clock/calendar monitors
the current day or date for a match condition with day/date alarm register (0Bh). With the day/date alarm register,
the hours, minutes, and seconds alarm bytes in the clock/calendar register map (02h, 01h, and 00h) are also
monitored. As a result, a wakeup occurs at the day or date and time specified by the day/date, hours, minutes, and
seconds alarm register values. This additional alarm occurs regardless of the programming of the TIE bit. When the
match condition occurs, the PWR pin is automatically driven low. This output can turn on the main system power
supply that provides VCC voltage to the DS1501/DS1511, as well as the other major components in the system.
Also at this time, the time-of-day/date alarm flag is set (TDF), indicating a wakeup condition has occurred.
If VBAUX is present, while VCC is low, the KS input pin is monitored for a low-going transition of minimum pulse width
tKSPW. When such a transition is detected, the PWR line is pulled low, as it is for a wakeup condition. Also at this
time, KSF is set, indicating that a kickstart condition has occurred. The KS input pin is always enabled and must
not be allowed to float.
The timing associated with the wakeup and kickstarting sequences is illustrated in Figure 7. These functions are
divided into five intervals, labeled 1 to 5 on the diagram.
The occurrence of either a kickstart or wakeup condition causes the PWR pin to be driven low, as described above.
During Interval 1, if the supply voltage on the VCC pin rises above VSO before the power-on timeout period (tPOTO)
expires, then PWR remains at the active-low level. If VCC does not rise above the VSO in this time, then the PWR
output pin is turned off and returns to its high-impedance level. In this event, the IRQ pin also remains three-stated.
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| DS1511W+ | 功能描述:實(shí)時(shí)時(shí)鐘 Y2K-Compliant Watchdog RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時(shí)間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| DS1511Y | 功能描述:實(shí)時(shí)時(shí)鐘 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時(shí)間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| DS1511Y+ | 功能描述:實(shí)時(shí)時(shí)鐘 Y2K-Compliant Watchdog RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時(shí)間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| DS1514FR000 | 制造商:Thomas & Betts 功能描述:100A,REC,4P5W,MG,514,3PY600V,SC |
| DS1514MP000 | 制造商:Thomas & Betts 功能描述:100A,PLG,4P5W,MG,514,3PY347V.SC |
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