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參數(shù)資料
| 型號： | DS14287 |
| 英文描述： | Real Time Clock with NV RAM Control |
| 中文描述： | 實時時鐘，帶有非易失RAM控制器 |
| 文件頁數(shù)： | 3/25頁 |
| 文件大小： | 303K |
| 代理商： | DS14287 |
DS14285/DS14287
3 of 25
For the DS14287 the internal lithium cell is electrically isolated from the clock and memory when
shipped from the factory. This isolation is removed after the first application of V
CC,
allowing the lithium
cell to provide data retention to the clock, internal RAM, V
CCO
and
CEO
on subsequent power-downs.
Care must be taken after this isolation has been broken to avoid inadvertently discharging the lithium cell
through the V
CCO
and
CEO
pins.
OPERATION
The block diagram in Figure 1 shows the pin connections with the major internal functions of the
DS14285/DS14287. The following paragraphs describe the function of each pin.
SIGNAL DESCRIPTIONS
GND, V
CC
- DC power is provided to the device on these pins. V
CC
is the +5 volt input.
SQW (Square Wave Output)
- The SQW pin can output a signal from one of 13 taps provided by the 15
internal divider stages of the real time clock. The frequency of the SQW pin can be changed by
programming Register A as shown in Table 1. The SQW signal can be turned on and off using the SQWE
bit in Register B. The SQW signal is not available when V
CC
is less than 4.25 volts typical.
AD0-AD7 (Multiplexed Bi-directional Address/Data Bus)
- Multiplexed buses save pins because
address information and data information time-share the same signal paths. The addresses are present
during the first portion of the bus cycle and the same pins and signal paths are used for data in the second
portion of the cycle. Address/data multiplexing does not slow the access time of the DS14285/DS14287
since the bus change from address to data occurs during the internal RAM access time. Addresses must be
valid prior to the falling edge of AS/ALE, at which time the DS14285/DS14287 latches the address from
AD0 to AD6. Valid write data must be present and held stable during the latter portion of the DS or
WR
pulses. In a read cycle the DS14285/DS14287 outputs 8 bits of data during the latter portion of the DS or
RD
pulses. The read cycle is terminated and the bus returns to a high impedance state as DS transitions
low in the case of Motorola timing or as
RD
transitions high in the case of Intel timing.
MOT (Mode Select) -
The MOT pin offers the flexibility to choose between to bus types. When
connected to V
CC
, Motorola bus timing is selected. When connected to GND or left disconnected, Intel
bus timing is selected. The pin has an internal pull-down resistance of approximately 20 K
. This pin is
on the DS14285Q only.
AS (Address Strobe Input) -
A positive going address strobe pulse serves to demultiplex the bus. The
falling edge of AS/ALE causes the address to be latched within the DS14285/DS14287.
DS (Data Strobe or Read Input) -
For the DS14285Q the DS/
RD
pin has two modes of operation
depending on the level of the MOT pin. When the MOT pin is connected to V
CC
, Motorola bus timing is
selected. In this mode DS is a positive pulse during the latter portion of the bus cycle and is called Data
Strobe. During read cycles, DS signifies the time that the DS14285Q is to drive the bidirectional bus. In
write cycles the trailing edge of DS causes the DS14285Q to latch the written data. When the MOT pin is
connected to GND, Intel bus timing is selected. In this mode the DS pin is called Read(
RD
).
RD
identifies
the time period when the DS14285Q drives the bus with read data. The
RD
signal is the same definition
as the Output Enable (
OE
) signal on a typical memory.
The DS14285, DS14285S and DS14287 do not have a MOT pin and therefore operate only in Intel bus
timing mode.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DS14285-DS14287 | Real Time Clock with NV RAM Control |
| DS14285 | Real Time Clock with NV RAM Control |
| DS14285N | Real Time Clock with NV RAM Control |
| DS14285Q | Real Time Clock with NV RAM Control |
| DS14285QN | Real Time Clock with NV RAM Control |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS14287+ | 功能描述:實時時鐘 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| DS1-48-0001 | 功能描述:固定電感器 DS Storage choke 3.15A RoHS:否 制造商:AVX 電感:10 uH 容差:20 % 最大直流電流:1 A 最大直流電阻:0.075 Ohms 工作溫度范圍:- 40 C to + 85 C 自諧振頻率:38 MHz Q 最小值:40 尺寸:4.45 mm W x 6.6 mm L x 2.92 mm H 屏蔽:Shielded 端接類型:SMD/SMT 封裝 / 箱體:6.6 mm x 4.45 mm |
| DS1-48-0002 | 功能描述:固定電感器 DS Storage choke 4A RoHS:否 制造商:AVX 電感:10 uH 容差:20 % 最大直流電流:1 A 最大直流電阻:0.075 Ohms 工作溫度范圍:- 40 C to + 85 C 自諧振頻率:38 MHz Q 最小值:40 尺寸:4.45 mm W x 6.6 mm L x 2.92 mm H 屏蔽:Shielded 端接類型:SMD/SMT 封裝 / 箱體:6.6 mm x 4.45 mm |
| DS1-48-0003 | 制造商:Schurter Electronic Components 功能描述: |
| DS1-48-0004 | 制造商:Schurter Electronic Components 功能描述: |
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