參數(shù)資料
型號: DS1384FP-12
英文描述: Watchdog Timekeeping Controller
中文描述: 看門狗計時控制器
文件頁數(shù): 2/17頁
文件大?。?/td> 307K
代理商: DS1384FP-12
DS1384
2 of 17
DESCRIPTION
The DS1384 Watchdog Timekeeping Controller is a self-contained real time clock, alarm, watchdog
timer, and interval timer which provides control of up to 128k x 8 of external low power CMOS static
RAM in a 44-pin quad flat pack package. An external crystal and battery are the only components
required to maintain time of day and RAM memory contents in the absence of power. Access to all RTC
functions and the external RAM is the same as conventional bytewide SRAM. Data is maintained in the
Watchdog Timekeeper by intelligent control circuitry which detects the status of V
CC
and write protects
both memory and timekeeping functions when V
CC
is out of tolerance. Timekeeper information includes
hundredths of seconds, seconds, minutes, hours, day, date, month, and year. The date at the end of the
month is automatically adjusted for months with less than 31 days, including correction for leap year. The
timekeeper operates in either 12- or 24-hour format with an AM/PM indicator. The watchdog internal
timer provides watchdog alarm windows and interval timing between 0.01 seconds and 99.99 seconds.
The real time alarm provides for preset times of up to one week. All of the RTC functions and the
internal 50 bytes of RAM reside in the lower 64 bytes of the attached RAM memory map. The externally
attached static RAM is controlled by the DS1384 via the
OER
and
CEO
signals.
Automatic backup and write protection for an external SRAM is provided through the V
CCO
,
CEO
and
OER
pins. The lithium energy source used to permanently power the real time clock is also used to retain
RAM data in the absence of V
CC
power through the V
CCO
pin. The chip enable output to RAM (
CEO
) and
the output enable to RAM (
OER
) are controlled during power transients to prevent data corruption. The
DS1384 is a complete one-chip solution in that an external crystal and battery are the only components
required to maintain time of day memory status in the absence of power.
SIGNAL DESCRIPTIONS
V
CC
, GND -
DC power inputs: DC operating voltage is provided to the device on these pins. V
CC
is the
+5V input.
V
BAT1
, V
BAT2
-
Battery inputs for any standard 3-volt lithium cell or other energy source. Battery voltage
must be held between 2.4 and 4-volts for proper operation. In the absence of power, the DS1384 will have
a maximum load of 0.5
μ
A at 25
°
C. This should be added to the amount of current drawn from the
external RAM in standby mode at 25
°
C to size the external energy source. The DS1384 samples V
BAT1
and V
BAT2
and always selects the battery with the higher voltage. If only one battery is used, the unused
battery input must be grounded.
A16-A0 -
Address Bus (inputs): The address bus inputs qualified by
CE
,
OE
,
WE
, and V
CC
voltage are
used to select the on-chip 64 timekeeping/RAM registers within the memory map of the external SRAM
controlled as nonvolatile storage. When the qualified address bus value is within the range of
00000H - 0003FH, one of the internal registers will be selected and
OER
will remain inactive. When the
value is outside of the range,
OE
will be passed through to
OER
.
D7-D0 -
Data Bus (bi-directional): When a qualified address from 00000H through 0003FH is presented
to the device, data is passed to or from the on-chip 64 timekeeping/RAM registers via the data bus lines.
Data will be written on the rising edge of
WE
when
CE
is active. If
CE
is active without
WE
, data is
read from the device and driven onto the data bus pins when
OE
is low.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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