參數(shù)資料
型號(hào): DS1286
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 12/18頁(yè)
文件大?。?/td> 0K
描述: IC TIMEKEEPER WATCHDOG 28-EDIP
標(biāo)準(zhǔn)包裝: 12
類型: 時(shí)鐘/日歷
特點(diǎn): 警報(bào)器,閏年,方波輸出,SRAM,監(jiān)視計(jì)時(shí)器
存儲(chǔ)容量: 50B
時(shí)間格式: HH:MM:SS:hh(12/24 小時(shí))
數(shù)據(jù)格式: YY-MM-DD-dd
接口: 并聯(lián)
電源電壓: 4.5 V ~ 5.5 V
電壓 - 電源,電池: 2.4 V ~ 3.5 V
工作溫度: 0°C ~ 70°C
安裝類型: 通孔
封裝/外殼: 28-DIP 模塊(0.61",15.49mm)23 引線
供應(yīng)商設(shè)備封裝: 28-EDIP
包裝: 管件
DS1284/DS1286
3 of 18
PIN DESCRIPTION
PIN
DIP
EDIP
PLCC
NAME
FUNCTION
1
INTA
Active-Low Interrupt Output A. This open-drain pin requires a
pullup resistor for proper operation.
2, 3
2, 3
X1, X2
Connections for Standard 32.768kHz Quartz Crystal. The internal
oscillator circuitry is designed for operation with a crystal having
a specified load capacitance (CL) of 6pF. The crystal is connected
directly to the X1 and X2 pins. There is no need for external
capacitors or resistors. For more information on crystal selection
and crystal layout considerations, refer to Application Note 58:
Crystal Considerations with Dallas Real Time Clocks.
4
2, 3, 4,
21, 24,
25
4
N.C.
No Connection
5–10
A5–A0
Address Inputs
11, 12,
13, 15,
16–19
11, 12,
13, 15,
16–19
11, 12,
13, 15,
16–19
DQ0, DQ1,
DQ2, DQ3,
DQ4–DQ7
Data Input/Output
14, 21
14
14, 21
GND
Ground
20
CE
Active-Low Chip-Enable Input
22
OE
Active-Low Output-Enable Input
23
SQW
Square-Wave Output. Push-pull output. High impedance when
VCC is below VTP.
24
24
RCLR
Active-Low RAM Clear. Used to clear (set to logic 1) all 50
bytes of user NV RAM, but does not affect the registers
involved with time, alarm, and watchdog functions. To clear the
RAM,
RCLR must be forced to an input logic 0 (-0.3V to
+0.8V) during battery-backup mode when VCC is not applied.
The
RCLR function is designed to be used via human interface
(shorting to ground or by switch) and not be driven with external
buffers. This pin is internally pulled up and should be left
floating when not in use.
25
25
VBAT
Input for Any Standard 3V Lithium Cell or Other Energy
Source. Input voltage must be held between the minimum and
maximum limits for proper operation. The supply should be
connected directly to the VBAT pin. A diode must not be placed
in series with the battery to the VBAT pin. Furthermore, a diode is
not necessary because reverse charging current-protection
circuitry is provided internal to the device and has passed the
requirements of Underwriters Laboratories for UL listing. This
pin should be grounded but can be left floating.
26
INTB
(INTB)
Active-Low (Active-High) Interrupt Output B. When the active-
high state is selected (IBH = 1), an open-drain pullup transistor
connected to VCC sources current when the output is active.
When the active-low state is selected (IBH = 0), an open-drain
pulldown transistor connected to ground sinks current when the
output is active. If active-high output operation is selected, a
pulldown resistor is required for proper operation. When active-
low output operation is selected, a pullup resistor is required for
proper operation.
27
WE
Active-Low Write-Enable Input
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