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| 型號： | DS1238A |
| 英文描述： | CAP 3.0UF 250VAC METALLIZED POLY |
| 中文描述： | 微管理器芯片 |
| 文件頁數(shù)： | 7/13頁 |
| 文件大?。?/td> | 211K |
| 代理商： | DS1238A |
DS1238A
7 of 13
MEMORY BACKUP
The DS1238A provides all of the necessary functions required to battery back a static RAM. First, an
internal switch is provided to supply SRAM power from the primary 5-volt supply (V
CC
) or from an
external battery (V
BAT
), whichever is greater. Second, the same power-fail detection described in the
power monitor section is used to hold the chip enable output (
CEO
) to within 0.3 volts of V
CC
or to within
0.7 volts of V
BAT
. The output voltage diode drop from V
BAT
(0.7V) is necessary to prevent charging of the
battery in violation of UL standards. Write protection occurs as V
CC
falls below V
CCTP
as specified. If
CEI
is low at the time power-fail detection occurs,
CEO
is held in its present state until
CEI
is returned
high, or the period t
CE
expires. This delay of write protection until the current memory cycle is completed
prevents the corruption of data. If
CEO
is in an inactive state at the time of V
CC
fail detection,
CEO
will
be unconditionally disabled within t
CF
. During nominal supply conditions
CEO
will follow
CEI
with a
maximum propagation delay of 20 ns. NO TAG shows a typical nonvolatile SRAM application.
FRESHNESS SEAL
In order to conserve battery capacity during initial construction of an end system, the DS1238A provides
a freshness seal that electrically disconnects the battery. This means that upon battery attachment, the
V
CCO
output will remain inactive until V
CC
is applied. This prevents V
CCO
from powering other devices
when the battery is first attached, and V
CC
is not present. Once V
CC
is applied, the freshness seal is broken
and cannot be invoked again without subsequent removal and reattachment of the battery.
POWER SWITCHING
When larger operating currents are required in a battery-backed system, the internal switching devices of
the DS1238A may be too small to support the required load through V
CCO
with a reasonable voltage drop.
For these applications, the PF output is provided to gate external power switching devices. As shown in
Figure 8, power to the load is switched from V
CC
to battery on power-down, and from battery to V
CC
on
power-up. The DS1336 is designed to use the PF output to switch between V
BAT
and V
CC
. It provides
better leakage and switchover performance than currently available discrete components. The transition
threshold for PF is set to the external battery voltage V
BAT
, allowing a smooth transition between sources.
Any load applied to the PF pin by an external switch will be supplied by the battery. Therefore, if a
discrete switch is used, this load should be taken into consideration when sizing the battery.
NONVOLATILE SRAM
Figure 7
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS1238A-10 | 功能描述:監(jiān)控電路 RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| DS1238A-10+ | 功能描述:監(jiān)控電路 RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| DS1238A10N | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
| DS1238A-10N | 功能描述:監(jiān)控電路 RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| DS1238A-10N+ | 功能描述:監(jiān)控電路 RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
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