Supply Voltage (VCC): 5.0" />
參數(shù)資料
型號(hào): DS1135Z-12
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 5/7頁(yè)
文件大?。?/td> 0K
描述: IC DELAY LINE 12NS 8-SOIC
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 100
功能: 多個(gè),不可編程
延遲到第一抽頭: 12ns
可用的總延遲: 12ns
獨(dú)立延遲數(shù): 3
電源電壓: 4.75 V ~ 5.25 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOIC
包裝: 管件
DS1135
5 of 7
TEST CONDITIONS
Ambient Temperature: 25°C ± 3°C
Supply Voltage (VCC): 5.0V ± 0.1V
Input Pulse:
High: 3.0V ± 0.1V
Low: 0.0V ± 0.1V
Source Impedance: 50 Max.
Rise and Fall Time: 3.0ns Max. - Measured between 0.6V and 2.4V.
Pulse Width: 500ns
Pulse Period: 1s
Output Load Capacitance: 15pF
Output: Each output is loaded with the equivalent of one 74F04 input gate.
Data is measured at the 1.5V level on the rising and falling edges.
Note: The above conditions are for test only and do not restrict the devices under other data sheet
conditions.
NOTES:
1. All voltages are referenced to ground.
2. Pulse width and duty cycle specifications may be exceeded; however, accuracy will be application
sensitive with respect to decoupling, layout, etc.
3. Power-up time is the time from the application of power to the time stable delays are being produced
at the output.
TIMING DIAGRAM
tFALL
80%
tRISE
20%
IN
OUT
1.5V
tWI
PERIOD
1.5V
tPLH
tPHL
tOF
tOR
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