參數(shù)資料
型號: DS1110LE-500+
廠商: Maxim Integrated Products
文件頁數(shù): 7/7頁
文件大小: 0K
描述: IC DELAY LINE 10TAP 14-TSSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 96
標(biāo)片/步級數(shù): 10
功能: 不可編程
延遲到第一抽頭: 50ns
接頭增量: 50ns
可用的總延遲: 500ns
獨立延遲數(shù): 1
電源電壓: 2.7 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 14-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 14-TSSOP
包裝: 管件
DS1110L
3V 10-Tap Silicon Delay Line
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________ 7
2002 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
between the input and each tap. Each tap is selected
and connected to the counter by a VHF switch-control
unit. All measurements are fully automated, with each
instrument controlled by a central computer over an
IEEE-488 bus.
Output
Each output is loaded with the equivalent of one 450
resistor in parallel with a 15pF capacitor. Delay is mea-
sured at the 1.5V level on the rising and falling edge.
INPUT
CONDITION
Ambient Temperature
+25°C ±3°C
Supply Voltage (VCC)
3.3V ±0.1V
High = 3.0V ±0.1V
Input Pulse
Low = 0.0V ±0.1V
Source Impedance
50
max
Rise and Fall Time
2ns max
Pulse Width
500ns (1s for - 500ns)
Period
1s (2s for - 500ns)
Table 2. Test Conditions
Package Information
For the latest package outline information, go to www.maxim-ic.
com/packages.
Note: Above conditions are for test only and do not restrict the
operation of the device under other data sheet conditions.
Chip Information
TRANSISTOR COUNT: 6813
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