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參數(shù)資料
| 型號(hào)： | DS1085Z-25+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 11/21頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ECONOSCILLATOR SYNTH 8-SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 100 |
| 系列： | EconOscillator™ |
| 類型： | 頻率合成器 |
| PLL： | 無 |
| 輸入： | 時(shí)鐘 |
| 輸出： | 時(shí)鐘 |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:2 |
| 差分 - 輸入:輸出： | 無/無 |
| 頻率 - 最大： | 133MHz |
| 除法器/乘法器： | 是/無 |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOIC |
| 包裝： | 管件 |
DS1085
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9) This indicates the time taken between power-up and the outputs becoming active. An on-chip delay is
intentionally introduced to allow the oscillator to stabilize. tstab is equivalent to approximately 8000
clock cycles and hence depends on the programmed clock frequency.
10) Output voltage swings can be impaired at high frequencies combined with high-output loading.
11) After this period, the first clock pulse is generated.
12) A device must internally provide a hold time of at least 300ns for the SDA signal (referred to the
VIH MIN of the SCL signal) in order to bridge the undefined region of the falling edge of SCL.
13) The maximum tHD:DAT need only be met if the device does not stretch the LOW period (tLOW ) of the
SCL signal.
14) A fast-mode device can be used in a standard mode system, but the requirement tSU:DAT > 250ns must
then be met. This is automatically the case if the device does not stretch the LOW period of the SCL
signal. If such a device does stretch the LOW period of the SCL signal, it must output the next data
bit to the SDA line at least tR MAX + tSU:DAT = 1000ns + 250ns = 1250ns before the SCL line is
released.
15) CB—total capacitance of one bus line in picofarads; timing referenced to 0.9VCC and 0.1VCC.
16) EEPROM write begins after a STOP condition occurs.
17) Typical frequency shift due to aging is ±0.5%. Aging stressing includes Level 1 moisture reflow
preconditioning (24hr +125
°C bake, 168hr 85°C/85%RH moisture soak, and 3 solder reflow passes
+240 +0/-5
°C peak) followed by 1000hr max VCC biased 125°C HTOL, 1000 temperature cycles at -
55
°C to +125°C, 96hr 130°C/85%RH/5.5V HAST and 168hr 121°C/2 ATM Steam/Unbiased
Autoclave.
Figure 5. MASTER FREQUENCY TEMPERATURE VARIATION
M A S T E R F R E Q U E NCY T E M P E R AT URE
V ARIAT IO N
-2 .0 0
-1 .5 0
-1 .0 0
-0 .5 0
0.00
0.50
1.00
1.50
2.00
66 .00
82.75
99 .5 0
116.25
133.00
M A S TE R O S CILL A TO R F R E Q UE NCY (M Hz )
FR
EQ
UE
NCY
%
CHA
NG
EF
R
O
M
25°
C
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| DS1085Z-25+ | 功能描述:可編程振蕩器 EconOscillator f Synthesizer RoHS:否 制造商:IDT 封裝 / 箱體:5 mm x 7 mm x 1.5 mm 頻率:15.476 MHz to 866.67, 975 MHz to 1300 MHz 頻率穩(wěn)定性:+/- 50 PPM 電源電壓:3.63 V 負(fù)載電容:10 pF 端接類型:SMD/SMT 輸出格式:LVPECL 最小工作溫度:- 40 C 最大工作溫度:+ 85 C 尺寸:7 mm W x 5 mm L x 1.5 mm H 封裝: |
| DS1085Z-50 | 功能描述:可編程振蕩器 EconOscillator f Synthesizer RoHS:否 制造商:IDT 封裝 / 箱體:5 mm x 7 mm x 1.5 mm 頻率:15.476 MHz to 866.67, 975 MHz to 1300 MHz 頻率穩(wěn)定性:+/- 50 PPM 電源電壓:3.63 V 負(fù)載電容:10 pF 端接類型:SMD/SMT 輸出格式:LVPECL 最小工作溫度:- 40 C 最大工作溫度:+ 85 C 尺寸:7 mm W x 5 mm L x 1.5 mm H 封裝: |
| DS1085Z-50+ | 功能描述:可編程振蕩器 EconOscillator f Synthesizer RoHS:否 制造商:IDT 封裝 / 箱體:5 mm x 7 mm x 1.5 mm 頻率:15.476 MHz to 866.67, 975 MHz to 1300 MHz 頻率穩(wěn)定性:+/- 50 PPM 電源電壓:3.63 V 負(fù)載電容:10 pF 端接類型:SMD/SMT 輸出格式:LVPECL 最小工作溫度:- 40 C 最大工作溫度:+ 85 C 尺寸:7 mm W x 5 mm L x 1.5 mm H 封裝: |
| DS1086 | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:DS1086 Spread-Spectrum EconOscillator |
| DS1086_1203 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Spread-Spectrum EconOscillator |
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