參數(shù)資料
型號(hào): DS1035-6
英文描述: 3-in-1 High.Speed Silicon Delay Line
中文描述: 3合1 High.Speed硅延遲線
文件頁(yè)數(shù): 5/6頁(yè)
文件大?。?/td> 50K
代理商: DS1035-6
DS1035
5 of 6
TEST CONDITIONS
Ambient Temperature:
Supply Voltage (V
CC
):
Input Pulse:
High: 3.0V
±
=
0.1V
Low: 0.0V
±
=
0.1V
Source Impedance: 50
=
max.
Rise and Fall Time: 3.0 ns max. - Measured between 0.6V and 2.4V.
Pulse Width: 500 ns
Pulse Period: 1
μ
s
Output Load Capacitance: 15 pF
Output:
Each output is loaded with the equivalent of one 74F04 input gate.
Data is measured at the 1.5V level on the rising and falling edges.
25
°
C
±
=
3
°
C
5.0V
±
=
0.1V
Note:
The above conditions are for test only and do not restrict the devices under other data sheet
conditions.
TIMING DIAGRAM
NOTES:
1.
All voltages are referenced to ground.
2.
@ V
CC
=5 volts and 25
°
C, delay accuracy on both the rising and falling edges within tolerances given
in Table 1.
3.
Pulse width and duty cycle specifications may be exceeded; however, accuracy will be application
sensitive with respect to decoupling, layout, etc.
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