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參數(shù)資料
| 型號： | DS1005S-75/T&R |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 5/6頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DELAY LINE 5TAP 75NS 16-SOIC |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 標(biāo)片/步級數(shù)： | 5 |
| 功能： | 不可編程 |
| 延遲到第一抽頭： | 15ns |
| 接頭增量： | 15ns |
| 可用的總延遲： | 75ns |
| 獨(dú)立延遲數(shù)： | 1 |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC W |
| 包裝： | 帶卷 (TR) |
DS1005
5 of 6
TEST SETUP DESCRIPTION
Figure 3 illustrates the hardware configuration used for measuring the timing parameters on the DS1005.
The input waveform is produced by a precision pulse generator under software control. Time delays are
measured by a time interval counter (20 ps resolution) connected between the input and each tap. Each
tap is selected and connected to the counter by a VHF switch control unit. All measurements are fully
automated, with each instrument controlled by a central computer over an IEEE 488 bus.
TEST CONDITIONS
INPUT:
Ambient Temperature
25
°C ±=3°C
Supply Voltage (VCC)
5.0V
±=0.1V
Input Pulse
High = 3.0V
±=0.1V
Low = 0.0V
±=0.1V
Source Impedance
50 ohm maximum
Rise and Fall Time
3.0 ns maximum
Pulse Width
500 ns
Period
1
s
OUTPUT:
Each output is loaded with the equivalent of a 74F04 input gate. Delay is measured at the 1.5V level on
the rising and falling edge.
NOTE:
Above conditions are for test only and do not restrict the operation of the device under other data sheet
conditions.
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| DS1007-10 | 功能描述:延遲線/計時元素 RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 傳播延遲時間:1000 ps 工作溫度范圍: 封裝 / 箱體:QFN-24 封裝:Tube |
| DS1007-11 | 功能描述:延遲線/計時元素 RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 傳播延遲時間:1000 ps 工作溫度范圍: 封裝 / 箱體:QFN-24 封裝:Tube |
| DS1007-12 | 功能描述:延遲線/計時元素 RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 傳播延遲時間:1000 ps 工作溫度范圍: 封裝 / 箱體:QFN-24 封裝:Tube |
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