參數(shù)資料
型號: DS1000-40
英文描述: TRANSISTOR PNP 45V 100MA SOT563
中文描述: 5抽頭硅延遲線
文件頁數(shù): 4/5頁
文件大?。?/td> 65K
代理商: DS1000-40
DS1000
4 of 5
TEST CIRCUIT
Figure 3
TERMINOLOGY
Period:
The time elapsed between the leading edge of the first pulse and the leading edge of the
following pulse.
t
WI
(Pulse Width):
The elapsed time on the pulse between the 1.5V point on the leading edge and the
1.5V point on the trailing edge or the 1.5V point on the trailing edge and the 1.5V point on the leading
edge.
t
RISE
(Input Rise Time):
The elapsed time between the 20% and the 80% point on the leading edge of the
input pulse.
t
FALL
(Input Fall Time):
The elapsed time between the 80% and the 20% point on the trailing edge of the
input pulse.
t
PLH
(Time Delay, Rising):
The elapsed time between the 1.5V point on the leading edge of the input
pulse and the 1.5V point on the leading edge of any tap output pulse.
t
PHL
(Time Delay, Falling):
The elapsed time between the 1.5V point on the trailing edge of the input
pulse and the 1.5V point on the trailing edge of any tap output pulse.
TEST SETUP DESCRIPTION
Figure 3 illustrates the hardware configuration used for measuring the timing parameters on the DS1000.
The input waveform is produced by a precision pulse generator under software control. Time delays are
measured by a time interval counter (20 ps resolution) connected between the input and each tap. Each
tap is selected and connected to the counter by a VHF switch control unit. All measurements are fully
automated, with each instrument controlled by a central computer over an IEEE 488 bus.
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DS1000-45 RECTIFIER BRIDGE 1A 50V DB-1
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相關代理商/技術參數(shù)
參數(shù)描述
DS1000-40IND 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Tapped Delay Line
DS1000-45 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:5-Tap Silicon Delay Line
DS1000-450 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC
DS1000-45IND 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Tapped Delay Line
DS1000-50 功能描述:延遲線/計時元素 RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 傳播延遲時間:1000 ps 工作溫度范圍: 封裝 / 箱體:QFN-24 封裝:Tube