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參數(shù)資料
| 型號： | DOC0508 |
| 英文描述： | 8-bit Microcontroller with Flash(57.64 k) |
| 中文描述： | 8位閃存（57.64畝微控制器） |
| 文件頁數(shù)： | 5/7頁 |
| 文件大小： | 57K |
| 代理商： | DOC0508 |
full configurations (or 40000 gates) or, more partial con-
figurations where the bitstream is much smaller depending
on how much is changed in a cycle.
The software controlling the FPGA configuration resides
within the internal memory of the microcontroller and only
needs to know the start address of the bitstreams. It can
detect the end itself by searching for the postamble. An-
other possibility might be a control program that after
power-up searches the whole data memory for preambles
(for bitstreams). Then the controller receives the com-
mand to download the second configuration into the third
FPGA by its serial interface, and downloads this configu-
ration into the FPGA, and so on. To control this approach,
careful system planning is necessary in order not to de-
stroy a working function.
When using parallel memories instead of serial memories,
the configuration is done very fast. Serial memories are
more space-efficient, but slower. In space-sensitive appli-
cations they can be a solution. There are serial memories
that are connected to an FPGA directly. They allow only
one configuration, and they are costly. When using a mi-
crocontroller, standard serial memories are used that are
cheaper and store more than one configuration. For exam-
ple, if an AT24C64 serial memory with 1
2
C bus interface
is used, more than 3 full configurations for the AT6002 is
stored.
Software Examples
Provided that a configuration cycle has finished with the FPGA releasing the /CON line, a subroutine for transferring a
configuration bitstream to a FPGA is relatively simple. In the case of parallel data transfer it is seen as the following:
config:
loopl:
MOV DPTR, #200H
MOVX A, @DPTR
MOV P1, A
SETB P0.5
CLR P0.5
INC DPTR
JNB P0.1, error
JNB P0.4, loopl
RET
do something. . .
;start address bitstream
;load byte of bitstream
;output at port 1
;one clock pulse high
;clock low
;next byte
;ERR is low
;if CON is low, continue
;configuration finished
error:
In the case of serial data transfer a byte of the bitstream has to be converted from parallel to serial, but this is done with
ROTATE instructions:
RRC A
MOV P1.6, C
RRC A
MOV P1.6, C
RRC A
MOV P1.6, C
. . .
;first bit to carry
;output carry as data bit
;second bit to carry
;output carry as data bit
;third bit to carry
;output carry as data bit
A similar approach is applied in the case of a serial memory containing the configuration bitstreams. The microcontroller
assembles them to a byte. When configuring in serial mode, this bit is handed over directly to the FPGA.
When storing several configurations in the address space of a microcontroller, it is complicated and error-prone to change
the start addresses of the bitstreams within the microcontroller program. Another possibility is shown in the following code
example: a table of 8 start addresses is created and the microcontroller searches the address space for bitstreams. Each
time he finds a beginning, the start address is stored in the table. With this approach several configurations are stored at
variable locations. In this example it is assumed that every bitstream begins with the preamble and the control register
content is 00 hex (this is the second byte of the bitstream). This program is simply to show the principles applying. It is
also assumed that an AT89C51 with 4 Kbytes internal memory is used and the bitstreams are stored starting with address
1024 (0400 hex).
Microcontroller
4-25
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