參數(shù)資料
型號(hào)： DMZ1501-9PD6AHFU
元件分類(lèi)： 電源模塊
英文描述： 1-OUTPUT DC-DC REG PWR SUPPLY MODULE
封裝： 168.50 X 111.20 MM, 38.70 MM HEIGHT, METAL, CASE M02, MODULE
文件頁(yè)數(shù)： 24/24頁(yè)
文件大?。?/td> 536K
代理商： DMZ1501-9PD6AHFU
M-Family
DC-DC Converters <100 W
Rugged Environment
7 - 10
Edition 2/96 - Melcher AG
MELCHER
The Power Partners.
7.1
Output Current Allocation for special Types
Output currents differing from those given for standard
types (as per "Type Survey") can be provided. A maximum
output power of 50 W should be considered, if an ambient
temperature range of –25...71
°C is required.The maximum
permissible output currents are indicated in the table below.
If (upon customer's request) output voltages are different
from standard values, the relevant output currents have to
be adapted accordingly.
With reduced maximum ambient temperature or with forced
cooling, the total output power may exceed 50 W. Custom-
ized configurations always need to be checked by a feasi-
bility study first. Please ask Melcher's sales engineers for a
proposal appropriate to your specific needs.
Inhibit (i Input)
The outputs of the module may be enabled or disabled by
means of a logic signal (TTL, CMOS, etc.) applied to the
inhibit input. If the inhibit function is not required, connect
the inhibit pin 2 to pin 23 to enable the outputs (active low
logic, fail safe).
The reference for the inhibit signal is the negative pin of
output 1.
Table 8: Current allocation with special types
Output voltage
Output 1
Output 2
Output 3
Temperature
all types
A...LM 2000
A...LM 3000
Uo1/2/3 nom [V]
Io1 max [A]
Io2 max [A]
Io3 max [A]
TA [°C]
TC [°C]
5.1
8.0
4.0
1.8 (2.5 1)
1.5
–25...71
–25...95
12
4.0
2.0
1.5
1.2
15
3.4
1.7
1.2
1.0
24
2.0
1.0
0.7
0.5
2
5.1
10.0
4.5
2.1 (2.8 1)
1.8
–25...60
–25...90
12
5.0
2.5
1.7
1.5
15
4.0
2.0
1.5
1.3
24
2.5
1.3
0.9
0.7
5.1
11.0
5.0
2.4 (3.0 1)
2.0
–25...50
–25...85
12
6.0
3.0
2.0
1.7
15
4.6
2.3
1.7
1.5
24
3.0
1.5
1.0
0.8
1 Special high current components required, 2 Ui min has to be increased
Fig. 4
Typical output voltage Uo1 versus output currents Io
Vo–
i
Vo+
I
inh
U
inh
Vi+
Vi–
1.6
0.8
0
-0.8
-50
-40
20
40
U
inh [V]
I
inh [mA]
-30
0
-20
-10
10
30
50
2.0
1.2
0.4
-0.4
U
inh= 0.8 V
U
o = on
U
o = off
U
inh= 2.4 V
1.0
0
0.5
U
o1
0.5
U
o1 nom
I
o
I
o nom
1.0
1.2
I
o nom
I
o1
I
o2,Io3
I
oL1
I
oL2,IoL3
AM...LM and C/D/LMZ
.95
Uo
Io/Io nom
3/3
2/3
1/3
0
t
uod
t d
td
=
≥10 s
Fig. 5
Control deviation of Uo versus dynamic load change
Fig. 6
Definition of inhibit voltage and current
Fig. 7
Typical inhibit current Iinh versus inhibit voltage Uinh
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