
DM9601
USB to Ethernet MAC Controller with Integrated 10/100 PHY
Preliminary
Version: DM9601-DS-P01
June 22, 2001
33
11.6 Auto-negotiation Link Partner Ability Register (ANLPAR) – 05
This register contains the advertised abilities of the link partner when received during Auto-negotiation.
Bit
Bit Name
Default
Description
5.15
NP
0, RO
Next Page Indication
0 = Link partner, no next page available
1 = Link partner, next page available
Acknowledge
1 = Link partner ability data reception acknowledged
0 = Not acknowledged
The PHY's auto-negotiation state machine will automatically
control this bit from the incoming FLP bursts. Software should not
attempt to write to this bit
Remote Fault
1 = Remote fault indicated by link partner
0 = No remote fault indicated by link partner
Reserved
Write as 0, ignore on read
Flow Control Support
1 = Controller chip supports flow control ability by link partner
0 = Controller chip doesn’t support flow control ability by link
partner
100BASE-T4 Support
1 = 100BASE-T4 is supported by the link partner
0 = 100BASE-T4 is not supported by the link partner
100BASE-TX Full Duplex Support
1 = 100BASE-TX full duplex is supported by the link partner
0 = 100BASE-TX full duplex is not supported by the link partner
100BASE-TX Support
1 = 100BASE-TX half duplex is supported by the link partner
0 = 100BASE-TX half duplex is not supported by the link partner
10BASE-T Full Duplex Support
1 = 10BASE-T full duplex is supported by the link partner
0 = 10BASE-T full duplex is not supported by the link partner
10BASE-T Support
1 = 10BASE-T half duplex is supported by the link partner
0 = 10BASE-T half duplex is not supported by the link partner
Protocol Selection Bits
Link partner’s binary encoded protocol selector
5.14
ACK
0, RO
5.13
RF
0, RO
5.12-5.11
RESERVED
X, RO
5.10
FCS
0, RW
5.9
T4
0, RO
5.8
TX_FDX
0, RO
5.7
TX_HDX
0, RO
5.6
10_FDX
0, RO
5.5
10_HDX
0, RO
5.4-5.0
Selector
<00000>, RO