參數(shù)資料
型號(hào): DM93L16
文件頁數(shù): 131/158頁
文件大?。?/td> 2668K
代理商: DM93L16
Switching Characteristics
V
CC
e a
5.0V, T
A
e a
25
§
C (See Section 1 for test waveforms and output load)
Symbol
Parameter
C
L
e
15 pF
Units
Min
Max
tPLH
tPHL
Propagation Delay
S to Zn
36
49
ns
tPLH
tPHL
Propagation Delay
I0 or I1 to Zn
30
22
ns
tPLH
tPHL
Propagation Delay
E to Zn
27
27
ns
Functional Description
The 93L22 quad 2-input multiplexer provides the ability to
select four bits of either data or control from two sources, in
one package. The Enable input (E) is active LOW. When not
activated all outputs (Z
n
) are LOW regardless of all other
inputs.
The 93L22 quad 2-input multiplexer is the logical implemen-
tation of a four-pole, two position switch, with the position of
the switch being set by the logic levels supplied to the one
select input. The logic equations for the outputs are shown
below:
Za
e
E
#
(I1a
#
S
a
I0a
#
S)
Zc
e
E
#
(I1c
#
S
a
I0c
#
S)
Zb
e
E
#
(I1b
#
S
a
I0b
#
S)
Zd
e
E
#
(I1d
#
S
a
I0d
#
S)
A common use of the 93L22 is the moving of data from a
group of registers to four common output busses. The par-
ticular register from which the data comes is determined by
the state of the select input. A less obvious use is as a
function generator. The 93L22 can generate four functions
of two variables with one variable common. This is useful for
implementing random gating functions.
Logic Diagram
TL/F/10198–3
3
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