參數(shù)資料
型號(hào): DM9301F
廠商: Electronic Theatre Controls, Inc.
英文描述: 100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter
中文描述: 100Mbps以太網(wǎng)光纖/雙絞線收發(fā)器單芯片
文件頁數(shù): 10/22頁
文件大?。?/td> 125K
代理商: DM9301F
DM9301
100Mbps Ethernet Fiber/Twisted Pair Single Chip Media Converter
10
Final
Version: DM9301-DS-F02
May 8, 2000
Functional Description
The DM9301 Fast Ethernet single-chip TX/FX media
converter, provides the functionality as specified in
IEEE802.3, integrates the complete 100BASE-TX and a
PECL optic module interface for 100Base-FX. The
DM9301 implements the PCS, PMA, and TP-PMD
sublayer functions, as defined by specification. The term
“X” will be used to describe the sections used in the fiber
PHY layer interface. The term “X” will be used to describe
the sections used in the twisted-pair PMD layer interface.
100BASE-FX to TX Operation
The block diagram in figure 1 provides an overview of the
functional blocks contained in the FX to TX media
converter interface.
The FX to TX interface includes the following functional
blocks:
FX PECL Receiver
FX Receiver Clock Recovery Module
FX NRZI to NRZ Converter
FX Serial to Parallel Converter
FX Code Group Alignment Monitor
TX Scrambler
TX Parallel to Serial Converter
TX NRZ to NRZI Converter
TX NRZI to MLT-3 Converter
TX MLT-3 Driver
FX PECL Receiver
The PECL receiver receives NRZI encoded, differential
Pseudo Emitter Coupled Logic level signal. The receiver
converts the receive signal into a single-ended NRZI
signal and presents this signal to the FX Clock Recovery
Module.
FX Receiver Clock Recovery Module
The FX Clock Recovery Module accepts NRZI data from
the PECL receiver. The FX Clock Recovery Module locks
onto the data stream, using a Phase Lock Loop (PLL) and
extracts the 125Mhz reference clock. The extracted and
synchronized clock and data are presented to the FX
NRZI to NRZ Decoder.
FX NRZI to NRZ Converter
The receive data stream is required to be NRZI encoded
for compatibility with the standards for 100Base- FX. This
conversion process must be reversed on the transmit end.
The FX NRZI to NRZ decoder, receives the NRZI
data stream from the FX Clock Recovery Module
and converts it to a NRZ data stream to be
presented to the FX Serial to Parallel conversion
block.
CGM
25M
OSC/XTAL
FX Code-
group
Alignment
Monitor
FX Serial
to
Parallel
FX
RX
CRM
TX
Scrambler
TX
Parallel
to Serial
TX
NRZ
to
NRZI
TX
NRZI to
MLT-3
MLT-3
Driver
TPTXO+/-
Rise/Fall
Time
CTL
25M FXRXCLK
125M FXRXCLK
FX
PECL
RCVR
PECLRXI +/-
FXSD
RCVR
FX Link
Status
Monitor
PECLSD
FX
NRZI
to
NRZ
FX to TX Block Diagram
Figure 1
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