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參數(shù)資料
| 型號： | DM9102A |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Single Chip Fast Ethernet NIC controller |
| 中文描述： | 單芯片快速以太網(wǎng)網(wǎng)卡控制器 |
| 文件頁數(shù)： | 17/77頁 |
| 文件大?。?/td> | 459K |
| 代理商： | DM9102A |
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DM9102A
Single Chip Fast Ethernet NIC controller
and bit 6 are set.
7
0
RO
Address/Data Stepping (0 For No Stepping)
6
0
RW
Parity Error Response Enable/Disable
Setting this bit will enable the DM9102A to assert PERR# on the detection
of a data parity error and to assert SERR# for reporting address parity
error.
5
0
RO
VGA Palette Snooping (0 For Not Support)
4
0
RO
Memory Write and Invalid (0 For Not Implementation)
The DM9102A only generates Memory write cycle.
3
0
RO
Special Cycles (0 For Not Implementation)
2
1
RW
Master Device Capability Enable/Disable
When this bit is set, DM9102A has the ability of master mode operation.
1
1
RW
Memory Space Access Enable/Disable
This bit controls the ability of memory space access. The memory access
includes memory mapped I/O access and Boot ROM access. As the
system boots up, this bit will be enabled by BIOS for Boot ROM memory
access. While in normal operation using memory mapped I/O access, this
bit should be set by driver before memory access cycles.
0
1
RW
I/O Space Access Enable/Disable
This bit controls the ability of I/O space access. It will be set by BIOS after
power on.
Final
Version: DM9102A-DS-F03
August 28, 2000
17
Revision ID (xxxxxx08 - PCIRV)
31
0
7
8
Revision ID
Class Code
3
4
Class Code
Revision Major Number
Revision Minor Number
Bit
31:8
Default
020000h
Type
RO
Description
Class Code (020000h)
This is the standard code for Ethernet LAN controller.
Revision Major Number
This is the silicon-major revision number that will increase for the subsequent
versions of the DM9102.A.
Revision Minor Number
This is the silicon-minor revision number that will increase for the subsequent
versions of the DM9102A.
7:4
0011
RO
3:0
0001
RO
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DM9102AF | Single Chip Fast Ethernet NIC controller |
| DM9102AT | Single Chip Fast Ethernet NIC controller |
| DM9108APPLICATIONENGINEERINGNOTESONE | DM9108 Application Engineering notes one |
| DM9108APPLICATIONENGINEERINGNOTESTHREE | DM9108 Application Engineering notes three |
| DM9108APPLICATIONENGINEERINGNOTESTWO | DM9108 Application Engineering notes two |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DM9102AF | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single Chip Fast Ethernet NIC controller |
| DM9102AT | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single Chip Fast Ethernet NIC controller |
| DM9102D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SINGLE CHIP FAST ETHEMET NIC CONTROLLER |
| DM9102DE | 制造商:DAVICOM 制造商全稱:DAVICOM 功能描述:Single Chip Fast Ethernet NIC Controller |
| DM9102DEP | 制造商:DAVICOM 功能描述:IC ENET CNTRL 10/100M PHY 1 制造商:DAVICOM 功能描述:IC ENET CNTRL 10/100M PHY 128LQFP 制造商:DAVICOM 功能描述:IC, ENET CNTRL, 10/100M PHY, 128LQFP 制造商:DAVICOM 功能描述:IC, ENET CNTRL, 10/100M PHY, 128LQFP; Data Rate:100Mbps; Ethernet Type:IEEE 802.3u; Supply Voltage Min:2.375V; Supply Voltage Max:2.625V; Digital IC Case Style:LQFP; No. of Pins:128; Interface Type:PCI; Operating Temperature Min:0C;;RoHS Compliant: Yes |
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