DM9095
Twisted-Pair Medium Attachment Unit
9
Final
Version: DM9095-DS-F02
August 21, 2000
Function Description
Transmit Functions
The DM9095 receives transmit data from DO + /DO - and
transfers it to the TP network. The input must be
transformer-coupled to the AUI circuit. The receiver is able
to pass differential signals as small as 300mV peak and as
large as 1315mV. DC biasing is provided with internal
common-mode, the common-mode is set to nominal 2.5V.
An internal analog delay line is used to generate the pre-
distortion signals at DTPO + and DTPO -. The DTPO + /
DTPO - signal delays 50ns after TPO + / TPO -. A delay
lock loop, referenced to the crystal clock, is used to generate
the internal delay line. All TP output driver pins are driver
low as a result of any of the following: there is an AUI IDL
pulse of at least 200ns duration; the output driver is
jabbered; the link-integrity option is enabled and there is a
link failure; or an IDL pulse is not detected at the end of a
packet and the input dose not exceed the detection
threshold of 500ns
100ns. When the driver detects that it
has finished sending an IDL pulse onto the TP, a timer of
not more than 500ns is started. While this timer is active,
activity on the DO + / DO - inputs is ignored.
Receive Functions
The TP receiver is connected to a band-limiting filter, whose
input is transformer-coupled to the twisted-pair TPI + / TPI -
pins. The receiver is able to resolve differential signals as
small as 350mV peak. Common-mode input voltage is
provided with internal common-mode, with the common-
mode set to nominal 2.5V. The receiver squelch circuit
prevents noise on the twisted-pair cable from falsely
triggering the receiver in the absence of true data. The
receiver will not be activated for signals at the buffer input
having a peak amplitude below 300mV, a continuous
frequency below 2 MHz, or a single cycle duration within the
pass band of the receive filter. This driver differentially
drives a current onto the load connected between the DI +
and DI - pins. The current through the load results in an
output voltage between
0.6V and
differentially between the two pins. As in figure 4, it shows
the typical loading for DI + / DI - driver. When the driver
detects that it has finished sending an IDL pulse onto the
AUI, a timer of not more than 500ns is started. While this
timer is active, activity on the TPI + / TPI - inputs is ignored,
1.2V, measured
and the AUI driver discharges the current stored on the
inductive load.
Collision Functions
A collision state exists whenever there are valid inputs to the
DM9095 from the network and from the DTE
simultaneously and the device is not in a link-integrity failure
state. The DM9095 reports collisions to the AUI by sending
a 10 MHz signal over the CI + / CI - pair. The collision
report signal is output no more than 9 BT after the chip
detects a collision. If TPI + / TPI - become active while
there is activity on the DO + / DO - pair, the loopback data
on TPI + / TPI - switches from transmit data to receive data
within 13 BT
3 BT. If a collision condition exits with TPI +
/ TPI - having gone idle while DO + / DO – are still active,
SQE continues for 7 BT
2 BT. If a collision condition
exits with DO + / DO – having gone idle while TPI + / TPI –
are still active, SQE may continue for up to 9 BT.
Jabber Functions
Jabber is a self-interrupt function that keeps a damaged
node from continously transmitting onto the network. The
chip contains a nominal window of 50ms, during which time
a normal data link frame can be transmitted. If a frame
length exceeds this duration, the jabber function inhibits
transmission and sends a collision signal on the CI + / CI –
pair. When activity on the DO + / DO – pair has ceased,
the chip continues to present the CSO signal to the CI + /
CI – pair for 0.5s
50%. The transmission of link-integrity
pulses from the TP drivers is not inhibited when the
DM9095 is jabbed and the link integrity function is enabled.
SQE Test Functions
When the DO + / DO – pair has gone idle after a successful
transmission and the heartbeat function is enabled, the chip
presents the CSO signal to the CI + / CI – pair. After a
successful transmission onto the network media, the chip
presents the CSO signal within 11 BT
activity on the DO + / DO – pair. The CSO signal is
presented for 10 BT
5 BT, after which the chip presents an
IDL on the CI + / CI – pair and returns to the idle state.
5 BT of the end of