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參數(shù)資料
| 型號： | DM74S138 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | Decoder/Demultiplexer |
| 中文描述： | 解碼器/解復(fù)用器 |
| 文件頁數(shù)： | 1/5頁 |
| 文件大小： | 55K |
| 代理商： | DM74S138 |
2000 Fairchild Semiconductor Corporation
DS006466
www.fairchildsemi.com
August 1986
Revised April 2000
D
DM74S138
DM74S139
Decoder/Demultiplexer
General Description
These Schottky-clamped circuits are designed to be used
in high-performance memory-decoding or data-routing
applications, requiring very short propagation delay times.
In high-performance memory systems these decoders can
be used to minimize the effects of system decoding. When
used with high-speed memories, the delay times of these
decoders are usually less than the typical access time of
the memory. This means that the effective system delay
introduced by the decoder is negligible.
The DM74S138 decodes one-of-eight lines, based upon
the conditions at the three binary select inputs and the
three enable inputs. Two active-LOW and one active-HIGH
enable inputs reduce the need for external gates or invert-
ers when expanding. A 24-line decoder can be imple-
mented with no external inverters, and a 32-line decoder
requires only one inverter. An enable input can be used as
a data input for demultiplexing applications.
The DM74S139 comprises two separate two-line-to-four-
line decoders in a single package. The active-LOW enable
input can be used as a data line in demultiplexing applica-
tions.
All of these decoders/demultiplexers feature fully buffered
inputs, presenting only one normalized load to its driving
circuit. All inputs are clamped with high-performance
Schottky diodes to suppress line-ringing and simplify sys-
tem design.
Features
I
Designed specifically for high speed:
Memory decoders
Data transmission systems
I
DM74S138 3-to-8-line decoders incorporates 3 enable
inputs to simplify cascading and/or data reception
I
DM74S139 contains two fully independent 2-to-4-line
decoders/demultiplexers
I
Schottky clamped for high performance
I
Typical propagation delay time (3 levels of logic)
DM74S138
8 ns
DM74S139
7.5 ns
I
Typical power dissipation
DM74S138
245 mW
DM74S139
300 mW
Ordering Code:
Order Number
DM74S138N
DM74S139N
Package Number
N16E
N16E
Package Description
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DM74S139 | One-of-Eight Line Decoder/Demultiplexer(1/8線譯碼器) |
| DM74S138N | Decoder/Demultiplexer |
| DM74S139N | General Purpose FET-Input Operational Amplifiers 8-SOIC -55 to 125 |
| DM74S140 | Dual 4-Input NAND 50Ω Line Driver(雙4輸入與非門線驅(qū)動器) |
| DM74S151 | 1-of-8 Data Selector/Multiplexer with Complementary Outputs(帶互補輸出的八選一 數(shù)據(jù)選擇器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DM74S138 WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| DM74S138N | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 3-to-8 Line Dec/Dem RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| DM74S139 WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| DM74S139N | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 Dl 2to4 Line Dec/Dem RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| DM74S140N | 功能描述:邏輯門 Dl 4-Input NAND Drv RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
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