參數(shù)資料
型號(hào): DM74AS163N
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: Synchronous 4-Bit Counter with Asynchronous Clear . Synchronous 4-Bit Counter
中文描述: AS SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, PDIP16
封裝: 0.300 INCH, MS-001, PLASTIC, DIP-16
文件頁數(shù): 4/7頁
文件大?。?/td> 72K
代理商: DM74AS163N
www.fairchildsemi.com
4
D
Absolute Maximum Ratings
(Note 1)
Note 1:
The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Recommended Operating Conditions
Supply Voltage
Input Voltage
Operating Free Air Temperature Range
Storage Temperature Range
Typical
θ
JA
N Package
M Package
7V
7V
0
°
C to
+
70
°
C
65
°
C to
+
150
°
C
71.5
°
C/W
101.0
°
C/W
Symbol
Parameter
Min
Nom
Max
Units
V
CC
V
IH
V
IL
I
OH
I
OL
f
CLK
t
SU
Supply Voltage
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Current
LOW Level Output Current
Clock Frequency
t
SETUP
, Set-Up Time
4.5
2
5
5.5
V
V
V
0.8
2
20
75
mA
mA
MHz
ns
ns
0
8
8
Data; A, B, C, D
En P, En T
LOAD
8
ns
CLEAR (Only for
DM74AS163)
LOW
12
ns
HIGH
9
Set-up 1
CLEAR
8
ns
(Only for DM74AS161)
t
HOLD
, Hold Time
t
H
Data; A, B, C, D
En P, En T
0
0
ns
ns
LOAD
0
ns
CLEAR (Only for DM74AS163)
0
ns
Hold 0
CLEAR
0
ns
(Only for DM74AS161)
Width of Clock Pulse
Width of Clear Pulse, (DM74ASAS161 LOW)
t
WCLK
t
WCLR
6.7
8
ns
ns
相關(guān)PDF資料
PDF描述
DM74AS161MX Synchronous Up Counter
DM74AS163MX Synchronous Up Counter
DM74AS169AM Replaced by SN74LVC86A : Quadruple 2-Input Exclusive-OR Gate 14-SSOP -40 to 85
DM74AS169A Synchronous 4-Bit Binary Up/Down Counter(同步4位二進(jìn)制加/減計(jì)數(shù)器)
DM74AS169AN Synchronous 4-Bit Binary Up/Down Counter
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