參數(shù)資料
型號: DM74ALS374WMX
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: 9-Bit Bus-Interface Flip-Flop With 3-State Outputs 24-SO -40 to 85
中文描述: ALS SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20
封裝: 0.300 INCH, MS-013, SOIC-20
文件頁數(shù): 1/7頁
文件大?。?/td> 72K
代理商: DM74ALS374WMX
2000 Fairchild Semiconductor Corporation
DS006113
www.fairchildsemi.com
September 1986
Revised February 2000
D
DM74ALS374
Octal 3-STATE D-Type Edge-Triggered Flip-Flop
General Description
This 8-bit register features totem-pole 3-STATE outputs
designed specifically for driving highly-capacitive or rela-
tively low-impedance loads. The high-impedance state and
increased high-logic-level drive provides this register with
the capability of being connected directly to and driving the
bus lines in a bus-organized system without need for inter-
face or pull-up components. It is particularly attractive for
implementing buffer registers, I/O ports, bidirectional bus
drivers, and working registers.
The eight flip-flops of the DM74ALS374 are edge-triggered
D-type flip-flops. On the positive transition of the clock, the
Q outputs will be set to the logic states that were set up at
the D inputs.
A buffered output control input can be used to place the
eight outputs in either a normal logic state (HIGH or LOW
logic levels) or a high-impedance state. In the high-imped-
ance state the outputs neither load nor drive the bus lines
significantly.
The output control does not affect the internal operation of
the flip-flops. That is, the old data can be retained or new
data can be entered even while the outputs are OFF.
Features
I
Switching specifications at 50 pF
I
Switching specifications guaranteed over full
temperature and V
CC
range
I
Advanced oxide-isolated, ion-implanted Schottky TTL
process
I
Functionally and pin-for-pin compatible with LS TTL
counterpart
I
Improved AC performance over DM74LS374 at approxi-
mately half the power
I
3-STATE buffer-type outputs drive bus lines directly
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Connection Diagram
Order Number
DM74ALS374WM
DM74ALS374SJ
DM74ALS374N
Package Number
M20B
M20D
N20A
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
相關(guān)PDF資料
PDF描述
DM74ALS37A Quadruple 2-Input NAND Buffer
DM74ALS37AM 9-Bit Bus-Interface Flip-Flop With 3-State Outputs 24-TSSOP -40 to 85
DM74ALS37AN Quadruple 2-Input NAND Buffer
DM74ALS37AMX Quad 2-input NAND Gate
DM74ALS38A 9-Bit Bus-Interface Flip-Flop With 3-State Outputs 24-TSSOP -40 to 85
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DM74ALS37A 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Quadruple 2-Input NAND Buffer
DM74ALS37AJ/A+ 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Quad 2-input NAND Gate
DM74ALS37AM 功能描述:邏輯門 Qdrpl 2-Inp NAND Buf RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量(輸入/輸出):2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel
DM74ALS37AM/A+ 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Quad 2-input NAND Gate
DM74ALS37AM/B+ 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Quad 2-input NAND Gate