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參數(shù)資料
| 型號： | DM74ALS373WM |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | 9-Bit Bus-Interface Flip-Flop With 3-State Outputs 24-SOIC -40 to 85 |
| 中文描述： | ALS SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20 |
| 封裝： | 0.300 INCH, MS-013, SOIC-20 |
| 文件頁數(shù)： | 1/7頁 |
| 文件大?。?/td> | 71K |
| 代理商： | DM74ALS373WM |
2000 Fairchild Semiconductor Corporation
DS006220
www.fairchildsemi.com
April 1984
Revised February 2000
D
DM74ALS373
Octal D-Type 3-STATE Transparent Latch
General Description
These 8-bit registers feature totem-pole 3-STATE outputs
designed specifically for driving highly-capacitive or rela-
tively low-impedance loads. The high-impedance state and
increased high-logic-level drive provide these registers with
the capability of being connected directly to and driving the
bus lines in a bus-organized system without need for inter-
face or pull-up components. They are particularly attractive
for implementing buffer registers, I/O ports, bidirectional
bus drivers, and working registers.
The eight latches of the DM74ALS373 are transparent D-
type latches. While the enable (G) is HIGH the Q outputs
will follow the data (D) inputs. When the enable is taken
LOW the output will be latched at the level of the data that
was set up.
A buffered output control input can be used to place the
eight outputs in either a normal logic state (HIGH or LOW
logic levels) or a high-impedance state. In the high-imped-
ance state the outputs neither load nor drive the bus lines
significantly.
The output control does not affect the internal operation of
the latches. That is, the old data can be retained or new
data can be entered even while the outputs are OFF.
Features
I
Switching specifications at 50 pF
I
Switching specifications guaranteed over full tempera-
ture and V
CC
range
I
Advanced oxide-isolated, ion-implanted Schottky TTL
process
I
Functionally and pin for pin compatible with LS TTL
counterpart
I
Improved AC performance over DM74LS373 at approxi-
mately half the power
I
3-STATE buffer-type outputs drive bus lines directly
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Order Number
DM74ALS373WM
DM74ALS373SJ
DM74ALS373N
Package Number
M20B
M20D
N20A
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DM74ALS373SJX | 8-Bit D-Type Latch |
| DM74ALS373WMX | 8-Bit D-Type Latch |
| DM74ALS374 | 9-Bit Bus-Interface Flip-Flop With 3-State Outputs 24-SOIC -40 to 85 |
| DM74ALS374N | Octal 3-STATE D-Type Edge-Triggered Flip-Flop |
| DM74ALS374NX | 9-Bit Bus-Interface Flip-Flop With 3-State Outputs 24-SOIC -40 to 85 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DM74ALS373WM | 制造商:Fairchild Semiconductor Corporation 功能描述:74ALS TTL SMD 74ALS373 SOIC20 |
| DM74ALS373WM/A+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit D-Type Latch |
| DM74ALS373WM/B+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit D-Type Latch |
| DM74ALS373WM_Q | 功能描述:閉鎖 Oct D 3-STATE Latch RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| DM74ALS373WMX | 功能描述:閉鎖 Oct D 3-STATE Latch RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
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