參數(shù)資料
型號: DG405BDJ-E3
廠商: Vishay Siliconix
文件頁數(shù): 1/14頁
文件大?。?/td> 0K
描述: IC ANALOG SWITCH SPDT 16DIP
標準包裝: 500
功能: 開關(guān)
電路: 4 x SPST - NO
導(dǎo)通狀態(tài)電阻: 55 歐姆
電壓電源: 雙電源
電壓 - 電源,單路/雙路(±): ±15V
電流 - 電源: 1mA
工作溫度: -40°C ~ 85°C
安裝類型: 通孔
封裝/外殼: 16-DIP(0.300",7.62mm)
供應(yīng)商設(shè)備封裝: 16-PDIP
包裝: 管件
Vishay Siliconix
DG401B, DG403B, DG405B
Document Number: 73069
S11-0179-Rev. B, 07-Feb-11
www.vishay.com
1
Low-Power, High-Speed CMOS Analog Switches
FEATURES
44 V supply max rating
± 15 V analog signal range
On-resistance - RDS(on): 23
Low leakage - ID(on): 40 pA
Fast switching - tON: 100 ns
Upgrade to DG401B, DG403B, DG405B
TTL, CMOS compatible
Single supply capability
BENEFITS
Wide dynamic range
Break-before-make switching action
(DG403B only)
Simple interfacing
APPLICATIONS
Audio and video switching
Sample-and-hold circuits
Test equipment
PBX, PABX
DESCRIPTION
The DG401B, DG403B, DG405B monolithic analog switches
are replacements for the popular DG401/403/405 analog
switches and provide improved performance, combining
high speed (tON: 100 ns, typ) with low power consumption
make the DG401B series ideal for portable and battery
powered applications.
Built on the Vishay Siliconix proprietary high-voltage silicon-
gate process to achieve high voltage rating and superior
switch
on/off
performance,
break-before-make
is
guaranteed for the SPDT configurations.
Each switch conducts equally well in both directions when
on, and blocks up to 30 V peak-to-peak when off.
On-resistance is very flat over the full ± 15 V analog range.
The DG401B has two independent SPST switches. The
DG403B has four SPST switches in NO/NC combinations.
The DG405B has four switches in two SPST pairs (see
Functional Block Diagrams and Pin Configurations on pages
1 and 2.)
The DG401B, DG403B, DG405B is available in both 16-pin
plastic dip and 16-pin SOIC packages.
As a committed partner to the community and the
environment, Vishay Siliconix manufactures this product
with the lead (Pb)-free device terminations. For analog
switching products manufactured with 100 % matte tin
device terminations, the lead (Pb)-free “-E3” suffix is being
used as a designator.
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
Two SPST Switches per Package
Logic “0”
0.8 V
Logic “1”
2.4 V
DG401B
NC
GND
NC
V+
NC
IN2
D2
S2
D1
S1
NC
Dual-In-Line and SOIC
IN1
NC
V-
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Top View
TRUTH TABLE
Logic
Switch
0
OFF
1ON
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