
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
Top View
IN
1
IN
2
D
1
D
2
S
1
S
2
V–
V+
GND
WR
S
4
S
3
D
4
D
3
IN
4
IN
3
Dual-In-Line and SOIC
I
DG221
Siliconix
S-52881—Rev. C, 28-Apr-97
1
Quad SPST CMOS Analog Switch with Latches
Features
Benefits
Applications
Accepts 150-ns Write Pulse Width
5-V On-Chip Regulator
Built on PLUS-40 Process
Latches Are Transparent with WR Low
Low On-Resistance: 60
Compatible with Most P Buses
Allows Wide Power Supply Tolerance
Without Affecting TTL Compatibility
Reduced Power Consumption
Allows Flexibility of Design
P Based Systems
Automatic Test Equipment
Communication Systems
Data Acquisition Systems
Medical Instrumentation
Factory Automation
Description
The DG221 is a monolithic quad single-pole, single-throw
analog switch designed for precision switching applications in
communication, instrumentation and process control systems.
Featuring independent onboard latches and a common WR
pin, each DG221 can be memory mapped, and addressed as
a single data byte for simultaneous switching.
Designed on the Siliconix PLUS-40 CMOS process, the
DG221 combines low power and low on-resistance (60
typical) while handling continuous currents up to 20 mA.
An epitaxial layer prevents latchup.
The device features true bidirectional performance in the on
condition. These switches guarantee a rail-to-rail blocking
capability (44 V max), in the off condition.
Functional Block Diagram and Pin Configuration
Four Latchable SPST Switches per Package
0
0
ON
1
0
OFF
X
Control data latched-in,
switches on or off as selected
by last IN
X
X
1
Maintains previous state
Logic “0”
Logic “1”
0.8 V
2.4 V
Ordering Information
Temp Range
Package
Part Number
0 C to 70 C
16-Pin Plastic DIP
DG221CJ
–40 C to 85 C
16-Pin Narrow SOIC
DG221DY
–55 C to 125 C
16-Pin CerDIP
DG221AK/883
Updates to this data sheet may be obtained via facsimile by calling Siliconix FaxBack, 1-408-970-5600. Please request FaxBack document #70041.