參數(shù)資料
型號: DES9208901DGAZ(SMD)
廠商: Mitel Networks Corporation
英文描述: TV 8C 8#20 PIN RECP
中文描述: 1GHz的± 16/17,± 32/33多模數(shù)分頻器
文件頁數(shù): 2/8頁
文件大?。?/td> 129K
代理商: DES9208901DGAZ(SMD)
2
SP8782A & B
Electrical Characteristics
Unless otherwise stated, the Electrical Characteristics are guaranteed over the specified supply, frequency and
temperature range.
Supply Voltage
,
V
CC
= +4V to +5.5V, V
EE
= 0V
Temperature Tamb= -55
°
C to +125
°
C
,
(SP8782A), -40
°
C to +85
°
C (SP8782B)
Characteristic
Pin
Value
Min
1
Conditions
Max
Units
GHz
Maximum frequency
(sinewave input)
Minimum frequency
Min Slew rate for low frequency operation
Power Supply current, I
CC
Output low voltage
Output high voltage
Modulus control input high voltage
Modulus control input low voltage
Modulus control input high current
Modulus control input low current
Ratio select input high voltage
Ratio selected input low voltage
Ratio select input current
Clock to output propagation Delay
Set-up time, t
s
Release time,t
r
2, 3
Input = 200-1200mVp-p
2, 3
2, 3
8
7
7
5
5
5
5
1
1
1
2,3,7
5,7
5,7
50
100
60
1.7
V
CC
V
CC
0.3V
CC
1.2
-1.2
V
CC
0.4V
CC
10
3
MHz
V/
μ
s
mA
V
V
V
V
mA
mA
V
V
μ
A
ns
ns
ns
Input = 400-1200mVp-p
Output unloaded, V
CC
=5.5V
0
V
CC
-1.4
0.7V
CC
0
0.6
-0.6
0.6V
CC
0
-10
At driver end of 3k
resistor
At driver end of 3k
resistor
Via 3k
resistor to V
CC
Via 3k
resistor to V
CC
3
3
See note 1 and Fig. 3a
See note 2 and Fig. 3b
Notes: 1. The set-up time t
s
is defined as the minimum time that can elapse between L
H transition of the
modulus control input and the next L
H output transition to ensure that the
÷
16 (32) mode is obtained.
2. The release time t
r
is defined as the minimum time that can elapse between H
L transition of the modulus
control input and the next L
H output transition to ensure that the
÷
17 (33) mode is obtained.
Figure 2 Typical Pin Connections
DG 8
RATIO SELECT
CLOCK INPUT
CLOCK INPUT
V
EE
V
CC
OUTPUT
NC
MODULUS CONTROL
1
2
3
4
8
7
6
5
MP 8
V
CC
OUTPUT
NC
MODULUS CONTROL
1
2
3
4
8
7
6
5
RATIO SELECT
CLOCK INPUT
CLOCK INPUT
V
EE
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