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參數(shù)資料
| 型號(hào)： | DDX2060 |
| 英文描述： | Amplifier chipset |
| 中文描述： | 放大器芯片 |
| 文件頁(yè)數(shù)： | 10/15頁(yè) |
| 文件大?。?/td> | 538K |
| 代理商： | DDX2060 |
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____________ DDX-2000/2060
10
Details are subject to change without notice.
SYSTEM OVERVIEW
The DDX-2000/2060 is an all-digital 2-channel
amplifier chip set that delivers up to 35 watts per
channel at very high efficiency. The system
consists of a DDX-2000 Controller, DDX-2060
Power Device and an output filter. The DDX-
2000 Controller accepts standard digital audio
data and converts it to PWM logic level signals.
The device also includes digital volume, muting
and anti-clipping functions. The DDX-2060 is a
dual channel H-Bridge that converts DDX-2000
PWM timing signals to power at the load. A
passive low pass filter prior to the load
attenuates the modulation carrier. The DDX-
2060 is protected against over-voltage, thermal
and short circuit conditions.
DDX-2000 CONTROLLER
The DDX-2000 Controller is a 3.3V digital
integrated circuit that converts serial PCM digital
audio signals into Apogee's patented damped
ternary outputs. The device supports two
modes of digital volume control, mute and anti-
clipping functions. A block diagram of the
device is shown in Figure 1.
ACE
Figure 1 - DDX-2000 Functional Diagram
Audio Serial Interface
The DDX-2000 audio serial input was designed
to
interface
with
standard
components such as S/PDIF receivers, surround
sound decoders and digital signal processors.
Serial data input is controlled by three input pins:
serial clock (SCLK), serial data (SDATA), and
left/right clock (LRCLK) in either I
2
S or left
justified formats as controlled by the serial mode
pin (SMODE). The serial data formats and
timing diagram are shown in Figure 3. The
digital
audio
DDX-2000 utilizes serial data words of 16 bits
and accepts data words up to 24 bits.
Volume Interface
The volume level of the DDX2000 PWM outputs
can be adjusted by setting the left and right
volume registers (VOLL and VOLR). These
registers are seven bits with a step size of
approximately -0.75 dB providing an adjustment
range of –82.5 dB to +12.0 dB. Table 1 shows
the volume level as a function of the register
values. Following power-on-reset both volume
registers are set to 0x26 or -15.75 dB.
The volume registers, VOLL and VOLR, can be
set with a serial data load using a micro-
controller or similar device (serial mode) or by
incrementing the volume register using control
pins (toggle mode). This functionality is
controlled using the volume mode select pin
(VMODE) and two multifunction pins; volume
clock/volume up (VCLK/UP) and the volume
data/volume down (VDATA/DN).
Table 1 – Volume Control
Volume Register
(VOLL, VOLR)
hexadecimal
0x00, 0x80
0x01, 0x81
0x02, 0x82
. . .
0x10, 0x90
0x11, 0x91
0x12, 0x92
. . .
0x7e, 0xfe
0x7f, 0xff
When the VMODE is logic-high (internally
pulled-up) the device operates in toggle mode.
The volume registers (both VOLL and VOLR)
can be incremented either up or down by
bringing the inputs VCLK/UP or VDATA/DN low.
The
volume
register
approximately 5 steps per second, for the first
1.4 seconds and then increase to approximately
10 steps per second until the upper or lower
volume limits are reached or the input is
released.
A serial mode volume change is initiated by
bringing VMODE pin low. Serial data is input on
Volume
(dB)
+12.0
+11.25
+10.5
. . .
0.0
-0.75
-1.5
. . .
-82.5
Mute
will
increment
at
SERIAL
INTERFACE
VOLUME/
GAIN
PWM
GENERATION
ANTI-
CLIPPING
SYSTEM
CLOCKING
SCLK
SDATA
LRCLK
VMODE
VCLK/UP
VDATA/DN
OUTL[1:2]
OUTR[1:2]
XI XO LPIN LPOUT
MUTE
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DDX2060-13TR | 制造商:APOGEE TECHNOLOGY 功能描述:Quad Power Half-Bridge. 2x45W, 8 Ω |
| DDX2100 | 制造商:APOGEE TECHNOLOGY 功能描述:Quad Power Half-Bridge. 2x50/65W, 6/8 &# |
| DDX2100-13TR | 制造商:APOGEE TECHNOLOGY 功能描述:Quad Power Half-Bridge. 2x50/65W, 6/8 &# |
| DDX-2102 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:All-Digital High Efficiency Power Amplifier |
| DDX2102-13TR | 制造商:APOGEE TECHNOLOGY 功能描述:DDX POWER DEVICE - Mini Pack - LEAD FREE |
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