參數(shù)資料
型號(hào): DDC112
英文描述: Dual Current Input 20-Bit ANALOG-TO-DIGITAL CONVERTER
中文描述: 雙路電流輸入20位模擬數(shù)字轉(zhuǎn)換器
文件頁(yè)數(shù): 1/24頁(yè)
文件大?。?/td> 210K
代理商: DDC112
Printed in U.S.A. January, 2000
DDC112
International Airport Industrial Park Mailing Address: PO Box 11400, Tucson, AZ 85734 Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 Tel: (520) 746-1111
Twx: 910-952-1111 Internet: http://www.burr-brown.com/ Cable: BBRCORP Telex: 066-6491 FAX: (520) 889-1510 Immediate Product Info: (800) 548-6132
DDC112
Dual Current Input 20-Bit
ANALOG-TO-DIGITAL CONVERTER
FEATURES
G
MONOLITHIC CHARGE MEASUREMENT ADC
G
DIGITAL FILTER NOISE REDUCTION:
3.2ppm, rms
G
INTEGRAL LINEARITY:
±
0.005% Reading
±
0.5ppm FSR
G
HIGH PRECISION, TRUE INTEGRATING
FUNCTION
G
PROGRAMMABLE FULL SCALE
G
SINGLE SUPPLY
G
CASCADABLE OUTPUT
APPLICATIONS
G
DIRECT PHOTOSENSOR DIGITIZATION
G
CT SCANNER DAS
G
INFRARED PYROMETER
G
PRECISION PROCESS CONTROL
G
LIQUID/GAS CHROMATOGRAPHY
G
BLOOD ANALYSIS
DESCRIPTION
The DDC112 is a dual input, wide dynamic range,
charge-digitizing analog-to-digital converter (ADC) with
20-bit resolution. Low level current output devices,
such as photosensors, can be directly connected to its
inputs. Charge integration is continuous as each input
uses two integrators; while one is being digitized, the
other is integrating.
For each of its two inputs, the DDC112 combines
current-to-voltage conversion, continuous integration,
programmable full-scale range, A/D conversion, and
digital filtering to achieve a precision, wide dynamic
range digital result. In addition to the internal program-
mable full-scale ranges, external integrating capacitors
allow an additional user-settable full-scale range of up
to 1000pC.
To provide single-supply operation, the internal ADC
utilizes a differential input, with the positive input tied
to V
REF
. When the integration capacitor is reset at the
beginning of each integration cycle, the capacitor
charges to V
REF
. This charge is removed in proportion
to the input current. At the end of the integration cycle,
the remaining voltage is compared to V
REF
.
The high-speed serial shift register which holds the
result of the last conversion can be configured to allow
multiple DDC112 units to be cascaded, minimizing
interconnections. The DDC112 is available in a SO-28
package and is offered in two performance grades.
Protected by US Patent #5841310
Dual
Switched
Integrator
Dual
Switched
Integrator
Σ
Modulator
Digital
Filter
Control
Digital
Input/Output
DVALID
DXMIT
DOUT
DIN
DCLK
RANGE2
RANGE1
RANGE0
TEST
CONV
CLK
CAP1A
CAP1A
CAP1B
CAP1B
CAP2A
CAP2A
CAP2B
CAP2B
IN2
IN1
V
REF
DGND
DV
DD
AGND
AV
DD
CHANNEL 1
CHANNEL 2
1997 Burr-Brown Corporation
PDS-1421D
For most current data sheet and other product
information, visit www.burr-brown.com
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