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參數(shù)資料
| 型號： | DCR1675SZ51 |
| 廠商： | DYNEX SEMICONDUCTOR LTD |
| 元件分類： | 晶閘管 |
| 英文描述： | Phase Control Thyristor |
| 中文描述： | 5920 A, 5100 V, SCR |
| 封裝： | Z, 5 PIN |
| 文件頁數(shù)： | 4/8頁 |
| 文件大小： | 109K |
| 代理商： | DCR1675SZ51 |
4/8
www.dynexsemi.com
DCR1675SZ
DYNAMIC CHARACTERISTICS
Parameter
Symbol
Conditions
Typ.
Max.
Units
GATE TRIGGER CHARACTERISTICS AND RATINGS
V
DRM
= 5V, T
case
= 25
o
C
Conditions
Parameter
Symbol
V
GT
Gate trigger voltage
V
DRM
= 5V, T
case
= 25
o
C
I
GT
Gate trigger current
V
GD
Gate non-trigger voltage
At V
DRM
T
case
= 125
o
C
V
FGM
Peak forward gate voltage
Anode positive with respect to cathode
V
FGN
Peak forward gate voltage
Anode negative with respect to cathode
V
RGM
Peak reverse gate voltage
I
FGM
Peak forward gate current
Anode positive with respect to cathode
P
GM
Peak gate power
See table, gate characteristics curve
P
G(AV)
Mean gate power
3.5
V
500
mA
0.25
V
30
V
0.25
V
5
V
30
A
150
W
10
W
Max.
Units
I
RRM
/I
DRM
Peak reverse and off-state current
At V
RRM
/V
DRM
, T
case
= 125
o
C
From 67% V
to 1000A
Gate source 30V, 10
t
r
= 0.5
μ
s to 1A, T
j
= 125
o
C
dV/dt
Maximum linear rate of rise of off-state voltage
To 67% V
DRM
T
j
= 125
o
C, gate open circuit.
-
500
mA
-
1000
V/
μ
s
Repetitive 50Hz
-
150
A/
μ
s
Non-repetitive
-
300
A/
μ
s
Rate of rise of on-state current
dI/dt
V
T(TO)
Threshold voltage
At T
vj
= 125
o
C
r
T
On-state slope resistance
At T
vj
= 125
o
C
t
gd
Delay time
1.0
-
V
-
0.15
m
-
1.1
μ
s
V
= 67% V
DRM
, Gate source 20V, 10
t
r
= 0.5
μ
s, T
j
o
C
I
L
Latching current
T
j
= 25
o
C, V
D
= 5V
I
H
Holding current
T
j
= 25
o
C, R
g-k
=
∞
-
650
mA
-
200
mA
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