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參數(shù)資料
| 型號(hào)： | DCR1279SD |
| 廠商： | Dynex Semiconductor Ltd. |
| 英文描述： | Phase Control Thyristor |
| 中文描述： | 相位控制晶閘管 |
| 文件頁(yè)數(shù)： | 3/9頁(yè) |
| 文件大?。?/td> | 71K |
| 代理商： | DCR1279SD |
DCR1279SD
3/9
DYNAMIC CHARACTERISTICS
Parameter
Symbol
Conditions
Typ.
Max.
Units
GATE TRIGGER CHARACTERISTICS AND RATINGS
V
DRM
= 5V, T
case
= 25
o
C
Conditions
Parameter
Symbol
V
GT
Gate trigger voltage
V
DRM
= 5V, T
case
= 25
o
C
I
GT
Gate trigger current
V
GD
Gate non-trigger voltage
At V
DRM
T
case
= 125
o
C
4.0
V
400
mA
0.25
V
Max.
Units
V
FGM
Peak forward gate voltage
Anode positive with respect to cathode
V
FGN
Peak forward gate voltage
Anode negative with respect to cathode
V
RGM
Peak reverse gate voltage
I
FGM
Peak forward gate current
Anode positive with respect to cathode
P
GM
Peak gate power
See table, fig.4
P
G(AV)
Mean gate power
30
V
0.25
V
5
V
10
A
150
W
5
W
I
RRM
/I
DRM
Peak reverse and off-state current
At V
RRM
/V
DRM
, T
case
= 125
o
C
From 67% V
to 1000A
Gate source 10V, 5
t
r
≤
0.5
μ
s, T
j
= 125
o
C
dV/dt
Maximum linear rate of rise of off-state voltage
To 67% V
DRM
T
j
= 125
o
C. Gate open circuit.
-
150
mA
-
300
V/
μ
s
Repetitive 50Hz
-
100
A/
μ
s
Non-repetitive
-
200
A/
μ
s
Rate of rise of on-state current
dI/dt
V
T(TO)
Threshold voltage
At T
vj
= 125
o
C
r
T
On-state slope resistance
At T
vj
= 125
o
C
t
gd
Delay time
1.14
-
V
-
0.587
m
-
2.5
μ
s
V
= 67% V
DRM
, Gate source 30V, 15
t
r
= 0.5
μ
s, T
j
o
C
I
L
Latching current
T
j
= 25
o
C, V
D
= 5V
I
H
Holding current
T
j
= 25
o
C, R
g-k
=
∞
300
1000
mA
-
500
mA
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