
SBVS028A DECEMBER 2000 REVISED APRIL 2004
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6
ADDITIONAL FUNCTIONS
DISABLE/ENABLE
The DCR02 can be disabled or enabled by driving the
SYNC pin using an open drain CMOS gate. If the SYNC
pin is pulled low, the DCR02 will be disabled. The disable
time depends upon the external loading. The internal
disable function is implemented in 2
μ
s. Removal of the pull
down will enable the DCR02.
Capacitance loading on the SYNC pin should be
minimized in order to prevent a reduction in the internal
oscillator frequency. See application report SBAA035 for
information on how to nullify the effects of additional
capacitance on the SYNC pin. The oscillator frequency
can be measured at V
REC
, as this is the fundamental
frequency of the ripple component.
OUTPUT ENABLE/DISABLE
The regulated output of the DCR02 can be disabled by
pulling the ENABLE pin low (by connecting ENABLE to
0V
OUT
). Holding the ENABLE pin high (connect ENABLE
to V
REC
) enables the regulated output voltage, thus
allowing the output to be controlled from the isolated side,
as shown in Figure 1.
ERROR FLAG
The DCR02 has an ERROR pin which provides a
power
good
flag, as long as the internal regulator is in regulation.
DECOUPLING
Ripple Reduction
Due to the very low forward resistance of the DMOS
switching transistors, high-current demands are placed
upon the input supply for a short time. By placing a good
quality low ESR 2.2
μ
F ceramic capacitor close to the IC
supply input pins, the effects on the power supply can be
minimized.
The high switching frequency of 400kHz allows relatively
small values of capacitors to be used for filtering the
rectified output voltage. A good quality, low ESR 1
μ
F
ceramic capacitor placed close to the V
REC
pin and output
ground will reduce the ripple.
It is not recommended that the DCR02 be fitted using an
IC socket because this degrades performance.
The output at V
REC
is full wave rectified and produces a
ripple of 800kHz.
It is recommended that a 0.1
μ
F low ESR ceramic capacitor
be connected close to the output pin and ground to reduce
noise on the output. The capacitor values listed are
minimum values. If lower ripple is required, the ceramic
filter capacitor should be increased in value to 2.2
μ
F.
NOTE:
As with all switching power supplies, the best
performance is only obtained with low ESR ceramic
capacitors connected close to the respective buses. If low
ESR ceramic capacitors are not used, the ESR will generate
a voltage drop when the capacitor is supplying the load
power. Often a larger capacitor is chosen for this purpose
when a low ESR smaller capacitance performs just as well.
DCR
02
V
OUT
V
IN
C
IN(1)
C
OUT
0.1
μ
F
R
ERR
10k
R
EN
10k
C
FILTER
1
μ
V
O1
0V
OUT
0V
ENABLE
V
REC
ERROR
V
S
U1
0V
SYNC
ERROR
SW1
(see text)
NOTE: (1) Required 2.2
μ
F low ESR ceramic capacitor.
Figure 1. DCR02 with a Single Output