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參數(shù)資料
| 型號(hào)： | DC941A |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 22/32頁 |
| 文件大小： | 0K |
| 描述： | BOARD DELTA SIGMA ADC LTC2482 |
| 軟件下載： | QuikEval System |
| 設(shè)計(jì)資源： | DC941A Design File DC941A Schematic |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | Easy Drive™, QuikEval™ |
| ADC 的數(shù)量： | 1 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 6.8 |
| 數(shù)據(jù)接口： | MICROWIRE?，串行，SPI? |
| 工作溫度： | 0°C ~ 70°C |
| 已用 IC / 零件： | LTC2482 |
| 已供物品： | 板 |
| 相關(guān)產(chǎn)品： | LTC2482IDD#TRPBF-ND - IC ADC 16BIT 10-DFN LTC2482CDD#TRPBF-ND - IC ADC 16BIT 10-DFN LTC2482IDD#PBF-ND - IC ADC 16BIT 10-DFN LTC2482CDD#PBF-ND - IC ADC 16BIT 10-DFN |
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LTC2482
29
2482fc
order modulator resolves this problem and guarantees a
predictable stable behavior at input signal levels of up to
150% of full scale. In many industrial applications, it is
not uncommon to have to measure microvolt level signals
superimposedovervoltlevelperturbationsandtheLTC2482
is eminently suited for such tasks. When the perturbation
is differential, the specication of interest is the normal
mode rejection for large input signal levels. With a reference
voltage VREF = 5V, the LTC2482 has a full-scale differential
input range of 5V peak-to-peak.
Remote Sensing with Easy Drive Input Current
Cancellation
One problem faced by designers of high performance data
acquisition systems is achieving data sheet specied per-
formance in a real world environment. One advantage delta
sigma type ADCs offer over the alternatives is on-chip digital
ltering (noise suppression). The disadvantage (solved by
Easy Drive technology) is the drive requirements inherent
in delta sigma ADC architectures. In order to demonstrate
the full potential of the Easy Drive technology, a practical
test case was characterized (see Figure 30).
Precise measurements of offset, noise and linearity were
measured under extreme test conditions. A remote sensor
was digitized through 100 meters of cable applied to an RC
network with low accuracy 1% resistors. A remote sen-
sor voltage was swept from 0 to 2.5 with less than 1LSB
linearity error (see Figure 31). Noise levels of 650nV RMS
and offsets below 5μV were measured (see Figure 32).
Fundamentally, an oversampled data converter (
ΔΣ ADC)
directly connected to a long cable and a low precision
RC network leads to many problems greatly limiting the
accuracy of the system. These include transmission line
effects, noise and DC settling errors.
The sampling network of
ΔΣ ADCs injects high frequency
current spikes into the cable. The resulting voltage spikes
are reected through the long wire and result in excessive
noise and reduced accuracy. This problem is solved by
placing a bypass capacitor across the input to the ADC.
This capacitor serves as a charge reservoir for the ADC’s
sampling network and reduces the voltage spikes by the
ratio of internal sampling capacitor to external bypass
capacitor. A 1μF bypass capacitor reduces the voltage
spikes generated by the sampling network by a factor of
50,000 (1V spikes are reduced to 18μV) and is sufcient
to achieve data sheet specied noise and accuracy.
The addition the large external bypass capacitor results in
input settling errors. Typical 24-bit high resolution delta
sigma ADCs sample at time intervals on the order of
10μs. In order to fully settle with a 1μF bypass capacitor,
the source impedance must be lower than 1Ω. Source
impedances greater than 1Ω result in offset and full-scale
errors due to the accumulation of charge settling errors
over the complete conversion cycle. Easy Drive technology
automatically removes the differential component of this
error. The remaining common mode error is reduced to a
xed offset as a function of the external resistor match-
ing seen at the plus and minus input of the ADC. In this
extreme case, 1k external resistors with 1% matching
result in a 3.5μV offset while the linearity and noise are
unaffected.
The signal path contains a 100 meter wire connected to
a low voltage source in a very noisy environment. Line
frequency noise is rejected by the on-chip digital lter
and guaranteed by the high accuracy on-chip oscillator.
High frequency noise is rejected by the external lowpass
lter formed by the input bypass capacitor and external
resistors.
APPLICATIONS INFORMATION
INPUT FREQUENCY (Hz)
0
20
40
60
80
100
120
140
160
180
200
220
NORMAL
MODE
REJECTION
(dB)
2482 F29
0
–20
–40
–60
–80
–100
–120
VCC = 5V
VREF = 5V
VIN(CM) = 2.5V
VIN(P-P) = 5V
TA = 25°C
MEASURED DATA
CALCULATED DATA
Figure 29. Input Normal Mode Rejection vs Input Frequency
with Input Perturbation of 100% Full Scale
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