參數(shù)資料
型號： DAC8562GBC
廠商： ANALOG DEVICES INC
元件分類： DAC
英文描述： +5 Volt, Parallel Input Complete 12-Bit DAC
中文描述： PARALLEL, WORD INPUT LOADING, 16 us SETTLING TIME, 12-BIT DAC, UUC19
封裝： DIE
文件頁數(shù)： 15/16頁
文件大?。?/td> 636K
代理商： DAC8562GBC
DAC8562
REV. A
–15–
DAC8562 – M68HC11 Interface Program Source Code
*
* DAC8562 to M68HC11 Interface Assembly Program
* Adolfo A. Garcia
* September 14, 1992
*
* M68HC11 Register definitions
*
PORTB
EQU
$1004
PORTC
EQU
$1003
*
DDRC
EQU
$1007
*
* RAM variables:
*
*
*
MSBS
EQU
$00
LSBS
EQU
$01
Port C control register
“0,0,0,0;0,CLR/,CE/,MSB-LSB/”
Port C data direction
MSBS are encoded from 0 (Hex) to F (Hex)
LSBS are encoded from 00 (Hex) to F (Hex)
DAC requires two 8-bit loads
Hi-byte: “0,0,0,0;MSB,DB10,DB9,DB8”
Lo-byte: “DB7,DB6,DB5,DB4;DB3,DB2,
DB1,DB0”
*
* Main Program
*
ORG
LDS
$C000
#$CFFF
Start of user’s RAM in EVB
Top of C page RAM
INIT
*
* Initialize Port C Outputs
*
LDAA
STAA
#$07
DDRC
0,0,0,0;0,1,1,1
CLR/,CE/, and MSB-LSB/ are now enabled
as outputs
0,0.0,0;0,1,1,0
CLR/-Hi, CE/-Hi, MSB-LSB/-Lo
Initialize Port C Outputs
LDAA
#$06
*
STAA
PORTC
*
* Call update subroutine
*
BSR
JMP
*
* Subroutine UPDATE
*
UPDATE
PSHX
PSHY
PSHA
*
* Enter contents of the Hi-byte input register
*
LDAA
#$0A
STAA
MSBS
*
* Enter Contents of’ Lo-byte input register
*
LDAA
#$AA
STAA
LSBS
*
LDX
#MSBS
LDY
#$1000
*
* Clear DAC output to zero
*
BCLR
PORTC,Y $04
BSET
PORTC,Y $04
*
* Loading input buffer latches
*
BSET
PORTC,Y $01
TFRLP
LDAA
0,X
STAA
PORTB
INX
CPX
#LSBS+1
BEQ
DUMP
BCLR
PORTC,Y $01
UPDATE
$E000
Xfer 2 8-bit words to DAC8562
Restart BUFFALO
Save registers X, Y, and A
0,0,0,0;1,0,1,0
MSBS are set to 0A (Hex)
1,0,1,0;1,0,1,0
LSBS are set to AA (Hex)
Stack pointer at 1st byte to send via Port B
Stack pointer at on-chip registers
Assert CLR/
De-assert CLR/
Set hi-byte register load
Get a byte to transfer via Port B
Write data to input register
Increment counter to next byte for transfer
Are we done yet
If yes, update DAC output
Latch hi-byte register and set lo-byte register
load
BRA
TFRLP
*
DAC8562–M68HC11 Interface Program Source Code (Continued)
* Update DAC output with contents of input registers
*
DUMP
BCLR
PORTC,Y $02
Assert CE/
BSET
PORTC,Y $02
Latch DAC register
*
PULA
When done, restore registers X, Y & A
PULY
PULX
RTS
** Return to Main Program **
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