LOGIC INPUTS (2) Input Current ±1 A V
參數(shù)資料
型號(hào)： DAC8531IDRBTG4
廠商： Texas Instruments
文件頁(yè)數(shù)： 21/27頁(yè)
文件大小： 0K
描述： IC D/A CONV LP 16-BIT 8-SON
產(chǎn)品培訓(xùn)模塊： Data Converter Basics
標(biāo)準(zhǔn)包裝： 250
設(shè)置時(shí)間： 8µs
位數(shù)： 16
數(shù)據(jù)接口： 串行
轉(zhuǎn)換器數(shù)目： 1
電壓電源： 單電源
功率耗散（最大）： 720µW
工作溫度： -40°C ~ 105°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 8-VDFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝： 8-SON 裸露焊盤(pán)（3x3）
包裝： 帶卷 (TR)
輸出數(shù)目和類(lèi)型： 1 電壓，單極；1 電壓，雙極
采樣率（每秒）： 93k
配用： 296-13548-ND - EVAL MOD FOR DAC8531
DAC8531
3
SBAS192B
www.ti.com
LOGIC INPUTS (2)
Input Current
±1
A
VINL, Input LOW Voltage
VDD = +5V
0.8
V
VINL, Input LOW Voltage
VDD = +3V
0.6
V
VINH, Input HIGH Voltage
VDD = +5V
2.4
V
VINH, Input HIGH Voltage
VDD = +3V
2.1
V
Pin Capacitance
3pF
POWER REQUIREMENTS
VDD
2.7
5.5
V
IDD (normal mode)
DAC Active and Excluding Load Current
VDD = +3.6V to +5.5V
VIH = VDD and VIL = GND
250
400
A
VDD = +2.7V to +3.6V
VIH = VDD and VIL = GND
240
390
A
IDD (all power-down modes)
VDD = +3.6V to +5.5V
VIH = VDD and VIL = GND
0.2
1
A
VDD = +2.7V to +3.6V
VIH = VDD and VIL = GND
0.05
1
A
POWER EFFICIENCY
I
OUT/IDD
I
LOAD = 2mA, VDD = +5V
89
%
TEMPERATURE RANGE
Specified Performance
–40
+105
°C
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
ELECTRICAL CHARACTERISTICS (Cont.)
V
DD = +2.7V to +5.5V. –40°C to +105°C, unless otherwise specified.
DAC8531E
PIN
NAME
DESCRIPTION
1VDD
Power-Supply Input, +2.7V to +5.5V.
2VREF
Reference Voltage Input
3VFB
Feedback connection for the output amplifier.
4VOUT
Analog output voltage from DAC. The output ampli-
fier has rail-to-rail operation.
5
SYNC
Level-triggered control input (active LOW). This is
the frame sychronization signal for the input data.
When SYNC goes LOW, it enables the input shift
register and data is transferred in on the falling
edges of the following clocks. The DAC is updated
following the 24th clock cycle unless SYNC is taken
HIGH before this edge, in which case the rising
edge of SYNC acts as an interrupt and the write
sequence is ignored by the DAC8531.
6
SCLK
Serial Clock Input. Data can be transferred at rates
up to 30MHz.
7DIN
Serial Data Input. Data is clocked into the 24-bit
input shift register on the falling edge of the serial
clock input.
8
GND
Ground reference point for all circuitry on the part.
PIN DESCRIPTION
PIN CONFIGURATIONS
Top View
V
DD
V
REF
V
FB
V
OUT
GND
D
IN
SCLK
SYNC
1
2
3
4
8
7
6
5
DAC8531
MSOP-8
1
2
3
4
8
7
6
5
GND
D
IN
SCLK
SYNC
V
DD
V
REF
V
FB
V
OUT
DAC8531
SON-8
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