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DAC8412/DAC8413
WAFER TEST LIMITS
REV. C
–4–
DAC8412GBC
DAC8413GBC
Limit
Parameter
Symbol
Conditions
Units
Integral Nonlinearity
Differential Nonlinearity
Min Scale Offset
Full-Scale Offset
Logic Input High Voltage
Logic Input Low Voltage
Logic Input Current
Logic Output High Voltage
Logic Output Low Voltage
Positive Supply Current
Negative Supply Current
INL
DNL
V
ZSE
V
FSE
V
INH
V
INL
I
IN
V
OH
V
OL
I
DD
I
SS
+1
+1
+1
+1
2.4
0.8
1
2.4
0.4
12
–10
LSB max
LSB max
LSB max
LSB max
V min
V max
μ
A max
V min
V max
mA max
mA min
I
OH
= +0.4 mA
I
OL
= –1.6 mA
V
REFH
= +2.5 V
NOTE
Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed
for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assembly and testing.
ABSOLUTE MAXIMUM RATINGS
(
T
A
= +25
°
C unless otherwise noted)
V
SS
to V
DD
. . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, +33.0 V
V
SS
to V
LOGIC
. . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, +33.0 V
V
LOGIC
to DGND . . . . . . . . . . . . . . . . . . . . . –0.3 V, +18.0 V
V
SS
to V
REFL
. . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, +V
SS
–2.0 V
V
REFH
to V
DD
. . . . . . . . . . . . . . . . . . . . . . . . . +2.0 V, +33.0 V
V
REFH
to V
REFL
. . . . . . . . . . . . . . . . . . . . . . . . +2.0 V, V
SS
–V
DD
Current into Any Pin 4 . . . . . . . . . . . . . . . . . . . . . . .
±
15 mA
Digital Input Voltage to DGND . . . . . –0.3 V, V
LOGIC
+0.3 V
Digital Output Voltage to DGND . . . . . . . . . . –0.3 V, +7.0 V
Operating Temperature Range
ET, FT, EP, FP, FPC . . . . . . . . . . . . . . . . –40
°
C to +85
°
C
AT, BT, BTC . . . . . . . . . . . . . . . . . . . . . –55
°
C to +125
°
C
Dice Junction Temperature . . . . . . . . . . . . . . . . . . . . . +150
°
C
Storage Temperature . . . . . . . . . . . . . . . . . . –65
°
C to +150
°
C
Power Dissipation Package . . . . . . . . . . . . . . . . . . . 1000 mW
Lead Temperature (Soldering, 60 sec) . . . . . . . . . . . . . +300
°
C
Thermal Resistance
Package Type
θ
JA
*
θ
JC
Units
28-Pin Hermetic DIP (T)
28-Pin Plastic DIP (P)
28-Lead Hermetic Leadless Chip Carrier (TC) 70
28-Lead Plastic Leaded Chip Carrier (PC)
50
48
7
22
°
C/W
28
°
C/W
25
°
C/W
°
C/W
63
NOTE
*
θ
JA
is specified for worst case mounting conditions, i. e.,
θ
JA
is specified for device
in socket.
DICE CHARACTERISTICS
CAUTION
1. Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to
the device. This is a stress rating only and functional operation at or above this specification is not
implied. Exposure to the above maximum rating conditions for extended periods may affect
device reliability.
2. Digital inputs and outputs are protected, however, permanent damage may occur on unprotected units
from high-energy electrostatic fields. Keep units in conductive foam or packaging at all times until
ready to use. Use proper antistatic handling procedures.
3. Remove power before inserting or removing units from their sockets.
4. Analog outputs are protected from short circuit to ground or either supply.
WARNING!
ESD SENSITIVE DEVICE
(@ V
DD
= +15.0 V, V
SS
= –15.0 V, V
LOGIC
= +5.0 V, V
REFH
= +10.0 V, V
REFL
= –10.0 V, T
A
= +25
8
C unless
otherwise noted.)