參數(shù)資料
型號: DAC8412
廠商: Analog Devices, Inc.
英文描述: Quad, 12-Bit DAC Voltage Output with Readback
中文描述: 四,12位DAC電壓輸出的回讀
文件頁數(shù): 6/14頁
文件大?。?/td> 443K
代理商: DAC8412
DAC8412/DAC8413
–6–
REV. D
PIN CONFIGURATIONS
Plastic DIP
V
REFH
V
OUTB
V
OUTA
V
SS
DGND
RESET
LDAC
DB0
(LSB)
DB1
DB2
DB3
DB4
DB5
DB6
DB10
DB9
DB8
DB7
DB11
(MSB)
R/
W
A1
A0
CS
V
LOGIC
V
DD
V
OUTD
V
OUTC
V
REFL
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
DAC8412
DAC8413
TOP VIEW
(NOT TO SCALE)
PLCC
5
6
7
8
9
10
11
DGND
RESET
LDAC
DB0
(LSB)
DB1
DB2
DB3
25
24
23
22
21
20
19
V
DD
V
LOGIC
CS
A0
A1
R/
W
DB11
(MSB)
4
3
2
1
28 27 26
V
S
V
O
V
O
V
R
V
R
V
O
V
O
12 13 14 15 16 17
18
D
D
D
D
D
D
D
DAC8412PC
DAC8413PC
TOP
VIEW
(NOT
TO
SCALE)
LCC
5
6
7
8
9
10
11
25
24
23
22
21
20
19
4
3
2
1
28 27 26
V
DD
V
LOGIC
CS
A0
A1
R/
W
DB11
(MSB)
DGND
RESET
LDAC
DB0
(LSB)
DB1
DB2
DB3
12 13 14 15 16 17
18
D
D
D
D
D
D
D
V
S
V
O
V
O
V
R
V
R
V
O
V
O
DAC8412TC
DAC8413TC
TOP
VIEW
(NOT
TO
SCALE)
PIN FUNCTION DESCRIPTIONS
Pin
Name
Description
1
2
3
4
5
6
V
REFH
V
OUTB
V
OUTA
V
SS
DGND
RESET
High-Side DAC Reference Input
DAC B Output
DAC A Output
Lower-Rail Power Supply
Digital Ground
Reset Input and Output Registers to all 0s,
Enabled at Active Low
Load Data to DAC, Enabled at Active Low
Data Bit 0, LSB
Data Bit 1
Data Bit 2
Data Bit 3
Data Bit 4
Data Bit 5
Data Bit 6
Data Bit 7
Data Bit 8
Data Bit 9
Data Bit 10
Data Bit 11, MSB
Active Low to Write Data to DAC. Active
High to Readback Previous Data at Data Bit
Pins with V
LOGIC
Connected to +5 V
Address Bit 1
Address Bit 0
Chip Select, Enabled at Active Low
Voltage Supply for Readback Function. Can
be Open Circuit If Not Used
Upper-Rail Power Supply
DAC D Output
DAC C Output
Low-Side DAC Reference Input
7
8
9
10
11
12
13
14
15
16
17
18
19
20
LDAC
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
DB8
DB9
DB10
DB11
R/
W
21
22
23
24
A1
A0
CS
V
LOGIC
25
26
27
28
V
DD
V
OUTD
V
OUTC
V
REFL
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