
3
DAC813
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
+V
CC
to ACOM .......................................................................... 0 to +18V
–V
CC
to ACOM .......................................................................... 0 to –18V
+V
to –V
............................................................................ 0 to +36V
DCOM with respect to ACOM .............................................................
±
4V
Digital Inputs (Pins 11–15, 17–28) to DCOM .................... –0.5V to +V
CC
External Voltage Applied to BPO Span Resistor ..............................
±
V
CC
V
REF OUT
........................................................... Indefinite Short to ACOM
V
................................................................. Indefinite Short to ACOM
Power Dissipation .......................................................................... 750mW
Lead Temperature (soldering, 10s) ............................................... +300
°
C
Max Junction Temperature............................................................ +165
°
C
Thermal Resistance,
θ
J-A
:Plastic DIP and SOIC ........................130
°
C/W
Ceramic DIP .........................................85
°
C/W
NOTE: (1) Stresses above those listed under “Absolute Maximum Ratings”
may cause permanent damage to the device. Exposure to absolute maximum
conditions for extended periods may affect device reliability.
ABSOLUTE MAXIMUM RATINGS
(1)
PIN
NAME
DESCRIPTION
1
+V
L
20V Range
Positive supply pin for logic circuits. Connect to +V
CC
.
Connect Pin 2 or Pin 3 to Pin 9 (V
OUT
) for a 20V
FSR. Connect both to Pin 9 for a 10V FSR.
2, 3
4
BPO
Bipolar offset. Connect to Pin 6 (V
) through
100
resistor or 200
potentiometer for bipolar
operation.
5
ACOM
Analog common,
±
V
CC
supply return.
+10V reference output referred to ACOM.
6
V
REF OUT
V
REF IN
7
Connected to V
through a 1k
gain
adjustment potentiometer or a 500
resistor.
Analog supply input, nominally +12V to +15V
referred to ACOM.
8
+V
CC
9
V
OUT
–V
CC
D/A converter voltage output.
10
Analog supply input, nominally –12V or –15V
referred to ACOM.
11
WR
Master enable for LDAC, LLSB, and LMSB. Must
be low for data transfer to any latch.
12
LDAC
Load DAC. Must be low with WR for data transfer
to the D/A latch and simultaneous update of the
D/A converter.
13
Reset
When low, resets the D/A latch such that a Bipolar
Zero output is produced. This control overrides all
other data input operations.
14
LMSB
Enable for 4-bit input latch of D
-D
data inputs.
NOTE: This logic path is slower than the WR path.
15
LLSB
Enable for 8-bit input latch of D
-D
data inputs.
NOTE: This logic path is slower than the WR path.
16
17
18
19
20
21
22
23
24
25
26
27
28
DCOM
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
Digital common.
Data Bit 1, LSB.
Data Bit 2.
Data Bit 3.
Data Bit 4.
Data Bit 5.
Data Bit 6.
Data Bit 7.
Data Bit 8.
Data Bit 9.
Data Bit 10.
Data Bit 11.
Data Bit 12, MSB, positive true.
PIN DESCRIPTIONS
ELECTROSTATIC
DISCHARGE SENSITIVITY
Electrostatic discharge can cause damage ranging from per-
formance degradation to complete device failure. Burr-
Brown Corporation recommends that all integrated circuits
be handled and stored using appropriate ESD protection
methods.
ESD damage can range from subtle performance degrada-
tion to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet
published specifications.
PACKAGE/ORDERING INFORMATION
PACKAGE
DRAWING
NUMBER
(1)
LINEARITY
ERROR, MAX
AT +25
°
C (LSB)
±
1/2
±
1/2
±
1/4
±
1/4
±
1/2
GAIN
DRIFT
(ppm/
°
C)
±
30
±
30
±
15
±
15
±
30
TEMPERATURE
RANGE
PRODUCT
PACKAGE
DAC813JP
DAC813JU
DAC813KP
DAC813KU
DAC813AU
28-Pin Plastic DIP
28-Lead Plastic SOIC
28-Pin Plastic DIP
28-Lead Plastic SOIC
28-Lead Plastic SOIC
246
217
246
217
217
0
°
C to +70
°
C
0
°
C to +70
°
C
0
°
C to +70
°
C
0
°
C to +70
°
C
–40
°
C to +85
°
C
NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book.